Frontend decoding x86 instructions to uops, like from P6 onwards, is a bit different from microcode in the usual terminology. I guess you could make an argument that uops are also a type of microcode. But it gets confusing since there is also traditional ROM based microcode in post-P6 x86 chips.
I don't see much difference, except for the existence of variable length instructions making decode harder. Having fully hardwired decoder from macrocode to microinstruction was pretty normal for early microcoded architectures, because a simplest such decoder is to latch the opcode as part of ROM address with ROM output being a wide microinstruction.
If you ensure the indexes are actually multiple microinstructions away from each other (for example, shift opcode to upper part of uOP program counter) you can easily map multiple uOPs when necessary without branching into more complex microcode.