On: The legend of “x86 CPUs decode instructions into R...

[hinkley]

We had to touch MIPS in school. Having to deal with branch delay slots was cruel. It broke some of my classmates. We were on a cusp of needing every programmer we could get and they were torturing students. I hope those teachers lost sleep over that.

Am I correct in recalling they removed branch delay slots in a later iteration of the chips?

[IAmLiterallyAB → hinkley]

IIRC They made new branch instructions without delay slots, but the normal branch instructions still have delay slots.

Had to write MIPS assembly by hand recently, incredibly counter intuitive.