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While not quite infinite, what you want sounds awfully close to a belt machine;

Each instruction reads data from positions on the belt and then puts a few values at the start of the belt. This causes values on the end to "fall off".

The MILL CPU is an example of this architecture.




The belt approach is sort of hybrid between registers and stack architectures. A disadvantage is that values on the belt may be at unknown locations after branches:

    var x = something();
    if (somethingElse() { stuff(); }
    print(x); // where is x??
Here x has to be spilled and reloaded. This is worse than a register machine where x can be assigned a register for its entire lifetime.

I think this style of architecture is at its best for straight-line code, but suffers with branchy code, loops, etc. which will require a lot of spilling.


The main reason to adopt a belt is that you don't need to encode the destination (or destinations on an instruction that returns multiple values). Instruction cache pressure is typically a critical design constraint on VLIW machines which is presumably why they went this route.

Also, that simplifies the compilers job and ties into the spiller design, etc.




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