>
The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point.
That was one (and surely important) reason. There were lots of others reasons
(seriously: everybody interested in the history of Itanium should read this text), for example:
"Davidson also pointed out two areas where academic research could create a blind spot for
architecture developers. First, most contemporary academic research ignored CISC
architectures, in part due to the appeal of RISC as an architecture that could be taught in a
semester-long course. Since graduate students feed the research pipeline, their initial areas of
learning frequently define the future research agenda, which remained focused on RISC.
Second, VLIW research tended to be driven by instruction traces generated from scientific or
numerical applications. These traces are different in two key ways from the average systemwide
non-scientific trace: the numerical traces often have more consistent sequential memory
access patterns, and the numerical traces often reflect a greater degree of instruction-level
parallelism (ILP). Assuming these traces were typical could lead architecture designers to
optimize for cases found more rarely in commercial computing workloads. Fred Weber echoed
this latter point in a phone interview. Bhandarkar also speculated that the decision to pursue
VLIW was driven by the prejudices of a few researchers, rather than by sound technical
analysis."
That was one (and surely important) reason. There were lots of others reasons
> http://courses.cs.washington.edu/courses/csep590/06au/projec...
(seriously: everybody interested in the history of Itanium should read this text), for example:
"Davidson also pointed out two areas where academic research could create a blind spot for architecture developers. First, most contemporary academic research ignored CISC architectures, in part due to the appeal of RISC as an architecture that could be taught in a semester-long course. Since graduate students feed the research pipeline, their initial areas of learning frequently define the future research agenda, which remained focused on RISC. Second, VLIW research tended to be driven by instruction traces generated from scientific or numerical applications. These traces are different in two key ways from the average systemwide non-scientific trace: the numerical traces often have more consistent sequential memory access patterns, and the numerical traces often reflect a greater degree of instruction-level parallelism (ILP). Assuming these traces were typical could lead architecture designers to optimize for cases found more rarely in commercial computing workloads. Fred Weber echoed this latter point in a phone interview. Bhandarkar also speculated that the decision to pursue VLIW was driven by the prejudices of a few researchers, rather than by sound technical analysis."