From what I gather online, intel is entering into an exestential crisis as homegrown chips and GPUs are replacing CPUs in the battle for tomorrow's data center. All of the interesting research from Google and others all have one thing in common: a custom asic processor.
The ASIC processors Google use are for inference, not training. Having efficient inference is great, but training is what uses up most of the compute power.
The battle between GPUs and CPUs in the datacenter is real, but I wouldn't count out regular CPUs yet. Even with GPU-ready frameworks like Tensorflow, Theano, and Pytorch, it still requires a fair amount of domain expertise to get good performance out of GPUs. These frameworks can automatically offload compute kernels to the GPU, but actually getting good performance still requires you to understand the memory model, what data to pin in GPU memory, how to use the limited GPU memory effectively, etc.
The new instruction sets that Intel have been adding (e.g. all of the recent vectorized FMA instructions) go a long way to making Intel CPUs competitive for a lot of this ASIC/GPU stuff out of the box for things like neural networks. Nvidia has been off to a really great start in this area, and they have carved out a very respectable lead, but I think it's premature to say that Intel (or AMD) are having an existential crisis.
Correction: the ASIC processors that Google used in 2015 and just talked about, two years later, were for inference. We don't know what they use now and how. The paper hints that training might happen in a later revision.
You have to wonder why they started with inference and not the other way round. Perhaps it's the case that you train a model once, then use it for predictions many, many, many times, thus using more aggregate compute power. (I used to work at Google, but the above is based on public information and speculation alone.)
The paper does confirm that CPUs are closer to GPUs for smaller or latency-sensitive workloads than most people assumed. At least on 2015-vintage hardware, that is. And they're a lot less trouble to set up and provision.
Training can happen asynchronously and in batch - inference needs to be low latency and have massive parallelism because it's powering millions of android devices voice to text recognition - for instance.
> You have to wonder why they started with inference and not the other way round.
At least from what I know of ASICs (which is admittedly pretty high-level), this direction is the natural way I'd expect it to go, because the inference problem is much closer in scale to the kind of problem ASICs are already widely used for and good at. Fast inference can be done with a chip of a size similar to what you see in existing ASICs, like specialized DSP chips. Speeding up training is a lot more speculative. You could try scaling up to massively powerful individual chips that can each replace an NVidia GPU (but with lower cost / lower power budget), or improve distributed training so you can effectively use a much larger number of much weaker customized chips. And there are more significant memory and memory-bandwidth issues with training, so it's less of the pure-compute type of problem that ASICs are more often clear wins for. All of which is probably possible with enough effort, but less straightforward, especially to end up with something that beats GPUs on relevant metrics.
> The ASIC processors Google use are for inference, not training. Having efficient inference is great, but training is what uses up most of the compute power.
I think that was the GP's point? The training is done on GPUs, the execution is done on ASICs, and neither step involves Intel. That's what alarms them. Dedicated hardware might help this, but that seems iffy to me. ML and neural networks are still a fast-evolving field, and instructions that might help today could be useless next year. ASICs can be thrown out and replaced, but instructions that Intel adds to its ISA will be there forever.
True, but for training, in near future, it is still going to be GPU, probably Nvidia GPU only, not too much Intel could do.
> requires a fair amount of domain expertise to get good performance out of GPUs
Rightfully so, but invisible to end user/programmer, if you ever use those frameworks and understand their abstraction level. This falls into the realm of few experienced engineers in Google/FAIR/Nvidia and other respected institutions, who understand their business well.
I think Intel is indeed having an existential crisis: they are losing the future, the future of computation is shifting, away from their comfort zone, and they yet figured out how to stop or catch up with the new trend. If CPU becomes a stock controller component, just like a WiFi-chip, how is Intel going to justify its hefty marketing valuation? It is about time for Intel to do some hard soul searching.
There's nothing about the TPU architecture that prevents use for training. Training is also done as tensor operations, and training can be done at limited precision[1]. Just because the first TPU was memory-limited doesn't mean TPUs can never be used for training.
The key problem with the TPU architecture for training is that its on-die buffer space is fairly limited and its memory bandwidth is currently nowhere near that of a GPU. This matters if you've got a lot of intermediate buffers that need to be alive at the same time for backpropagation. Also, there's the less fundamental matter of convenience: while there are some clever ways to train with limited precision gradients, it's not yet as easy as not doing that.
One style of training that would be a good fit for the current TPU architecture is some of the recent work on reinforcement learning without gradients:
Sure, but it's a garbage in, garbage out thing. If you're using those in production in something like, say, google images, you wouldn't want to lose accuracy on a one-time pass. Anything can be quantized lower, but you start making the tradeoff of losing information that may affect the quality of your product later.
Those "inference" chips are capable of 16/32 fixed point MADS on par with a current Pascal GPU with better perf/W. So they could be used for training. Just sayin'...
As to whether the TPU can perform efficient training or whether it chokes like current FPGAs due to insufficient memory bandwidth is a different question. That would be my guess but I'd love to be proven wrong.
There is quite a gulf between inference and training, it is not just raw FLOPS. Inference is relatively simple data/control-flow, the weights/biases can be stored read-only and the entire network dataflow can be baked into the chip in case of FPGAs. Training adds the backpropagation step, which performs memory read-update-writes all over the place, has kernels with bad arithmetic intensity and requires SP/DP for most models to converge.
I only know of Nervana's ASIC that is promising to be used for training and Google hinted at it for future work. Does anyone know of other processor, ASIC or FPGA's that are built for training?
So like I said, they didn't sufficiently think over the memory subsystem?
GPUs can transpose matrices in shared memory and register space in several different ways that are all efficient. I'm guessing that you are describing the transposed matrices required for calculating deltas and weight gradients here? If so, then I see, it's more than just the fact it has one-tenth the bandwidth of a consumer GPU it's just a less flexible architecture in the first place. One would hope they fix that for the second generation TPU which I assume they're working on already. That said I've yet to encounter a network that requires double-precision math to converge. Have you?
Half Precision can be tricky, but the same trick Nervana uses (dynamic fixed point) can be emulated in software and it has been used for graphics for decades. I specifically made use of it in an OpenGL engine 20 years ago for high resolution texture sampling.
As for Nervana IP, IMO they need to ship something soon or NVIDIA'S going to ship a GPU on par with it.
Which doesn't necessarily mean anything for Intel's future in machine learning. Intel bought an ARM chip maker before, too, and because of internal conflict of interest with the x86 group, it ended-up killing the ARM division.
Will the same happen to other non-x86 groups? Who knows. But we also see that even Intel's previous "accelerator" divisions have moved focus to being "CPU-driven" as well (Xeon Phi), so we have that data point.
I also remember some of the articles from a decade ago that were sure Intel's "might" would help it succeed in the mobile market. I'm not entirely sure if it's as bad for Intel in the machine learning market, because right now there's pretty much only one competitor rather than many.
It's usually much easier to be second in a market than the 5th, as some customers would inevitably get some raw deals from the incumbent, and they'll want an alternative. But if the machine learning market starts becoming entrenched around GPUs, that second player may end-up being AMD, which I think will have decent alternatives to Nvidia's training and inference GPUs in a year or two (mainly for 2019 with 7nm Navi, though).
> Intel bought an ARM chip maker before, too, and because of internal conflict of interest with the x86 group, it ended-up killing the ARM division.
reminds Sun in 1998 and the onward years when SPARC was like North Korea border patrol in preventing any x86 penetration into Sun even though it was clear that x86 was the future.
A release of Solaris for PC compatibles began shipping in 1993.
In 2002, Sun introduced its first general purpose x86 system, the LX50.
In 2003, Sun announced a strategic alliance with AMD to produce x86/x64 servers based on AMD's Opteron processor; this was followed shortly by Sun's acquisition of Kealia, a startup founded by original Sun founder Andy Bechtolsheim, which had been focusing on high-performance AMD-based servers. Hardware began shipping in 2004.
it would be very helpful to understand whether you know what you're talking about if you also stated whether you've been there or not :) I spent there about a decade.
> I also remember some of the articles from a decade ago that were sure Intel's "might" would help it succeed in the mobile market.
You don't even have to look that far back. As recently as two years ago, I remember comments here proclaiming with certainty that Intel would crush ARM because they had finally broken through the power wall.
I think a lot of folks, Intel included, have a strong belief in the inevitability of x86 dominance. But ultimately most of the inherent value of x86 is compatibility with Windows software (and DOS before it). Take that away and a lot of the advantages disappear. (Not to downplay the impressive technical and process achievements Intel has made, of course...)
Xeon Phi was a nice idea without much in terms of support or distribution. I tried getting one through various sources, they were advertised just about everywhere and even at huge discounts but actually getting one has so far proved to be impossible. And it still remains to be seen how useful it would have been, whereas a $600 GPU can be dropped into your computer and put to work in about half an hour. The hardest part is the driver installation and NVIDIA's dumb 'sign up before you download' strategy.
> ...but actually getting one has so far proved to be impossible.
Where/when did you try buying? I didn't think it was difficult to get the 1st-gen Phi cards while they were selling them --
especially as it seemed like nobody wanted them. Admittedly I never bought any myself, my employer picked up some 31S1P from a local server OEM for testing when they were massively discounted.
Note that the Knights Landing, the current generation is released socketed only for now, so you'd need to buy a server or the ninja dev platforms Intel sells through Colfax.
I tried two online vendors that were actively soliciting customers but when push came to shove they couldn't deliver. Right around the same time I ordered an FPGA dev kit and an NVIDIA board, solved the problem I was dealing with and moved on.
Still, I would have very much liked to play around with the 'phi'.
> Admittedly I never bought any myself, my employer picked up some 31S1P from a local server OEM for testing when they were massively discounted.
That's the kind of deal I was looking at too. Maybe they were massively discounted because they were already EOL'd?
> Still, I would have very much liked to play around with the 'phi'.
Well, if you're still interested, KNL is a significantly better architecture, so you could just try now.
> That's the kind of deal I was looking at too. Maybe they were massively discounted because they were already EOL'd?
Refreshed my memory and I was wrong; there was some discussion to jump on the $125-$195/card deal Colfax had late 2014 [1] (likely dumping stock due to EOL), but we figured that they are not even worth that much. In comparison, the one card we have was actually bought just 10-11 months before for ~$1500.
If I ran Intel, I'd keep both x86 and ARM chips and make a motherboard using x86 and ARM chips to work together with shared memory. The ARM could be given tasks to do that free up the x86 chip to make the system run faster. Plus ARM operating systems could be run in a virtual machine using the ARM chip to develop or test apps out.
Intel also produces x86 cores that use very low power (e.g. Intel Quark). It probably would be much easier (and much more in line with Intel's corporate objectives) to add such a low-power x86 core than an ARM core if there is such a desire.
So I stand by my point:
> What advantage does using an ARM core for this have over simply using an x86 core?
When I went into UM Rolla in 1986 I wanted to study computer engineering. I had liked the Amiga and its co-processors. It proved to me that if you had processors that took time off the main CPU the OS and apps can run faster.
But if you used 68000, Z80, 6502 chips as a co-processor to an 8088 CPU or Intel X86 you could assign tasks to them to free up the main CPU and even doing parallel processing.
Sure Intel can make low power CPUs but if you have an X86 and ARM chip working together, like an Apple Macintosh that wants to go to ARM eventually but needs X86 code to run as well, if they make Macs with an Intel X86 and ARM chips they can run iOS apps on the ARM and MacOS apps on the Intel to run more apps than a Mac normally has.
Edit:
I like to also add if Apple put am ARM chip on their Macs with an Intel chip and required the ARM for newer MacOS versions they can lock out the Hackintosh users from pirating their OS.
> But if you used 68000, Z80, 6502 chips as a co-processor to an 8088 CPU or Intel X86 you could assign tasks to them to free up the main CPU and even doing parallel processing.
Parallel programming is already possible using a CPU with multiple cores, which I think Intel would love to add more of if developers found usages for them that end users love. No necessity for a CPU using a different instruction set, which just makes programming this more complicated.
EDIT: And if there are active threads that require much less CPU power on some core(s), for modern CPUs the respective core will already enter energy saving states aggressively (giving lots of the advantages that adding low power cores has).
> The more cores added to an Intel chip, the more electricity it uses and the higher price it becomes.
It is much cheaper to produce as few versions of a chip as possible and deactivate cores (e.g. by fuses) for the cheaper versions. Also energy saving functions in processors have become so much better for the last, say, ten years that one has not to care anymore for energy usage of silicon that is not used.
> Sure it would be complex, the Commodore Amiga was complex but people figured out how to program the co-processors, etc.
At that time no less complex design was feasible. With today's technology it is. Why should one prefer to program a convoluted beast over programming a much more clean design?
AI and ML are complicated, many write code for it without knowing how it works by just putting libraries and examples together. Then they notice they only got a 20% success rate so they fiddle with the code until the rate goes higher.
We have so many people warning us about AI, and most of them are famous people who don't even know how it works because of how complex it has become. People often fear what they don't understand.
It is also why some people program in Haskell even if it is more complex than Python or Ruby on Rails.
I am talking about having an ARM CPU as a co-processor to an AMD or Intel system. You could even modify the X86 chips to have an ARM core or two because the design of the ARM chip is simpler than the Intel, which is why the Raspberry PI Zero is only $5 and is on a small circuit board powered by a USB cable.
The need for ARM code comes from mobile devices and in the Post-PC, Post-Microsoft, and Post-Windows era we need to look to alternatives to the way the PC used to work which was simple but out of date.
When JFK talked about going to the Moon, he didn't say it because it would be simple, he said we should do it because it is hard or complex. When he said that he had no idea how the rocket would get to the Moon, etc.
I am talking about a PC/Mobile hybrid using X86 and ARM technology that can run code made for both types of chips. One that both chips can work together as a team by assigning tasks to them.
Imagine if you will, Apple makes a new Hybrid Mac, it has an Intel CPU and ARM Co-Processor. It runs a new version of MacOS that has a virtual environment to run an ARM OS like iOS inside of it and has a touch screen. A developer can use XCode to create ARM iOS apps and then test them on the ARM chip which is the same in the latest iPhone/iPad, etc.
Do you think MacOSX was simple or complex to design? It was based on Unix instead of writing from scratch. It is designed to only work on Apple branded PCs aka Macintoshes. If it were simple to design it would have met the same fate as Copeland and other failures like the Apple Lisa or Apple III. Instead, it took Unix which has a higher learning curve and put the Mac GUI on top of it to make it simpler.
Also, Linux do you think to hack the Linux kernel is simple or complex? Do you read all of the cussing Linus does when someone submits unstable code to it that they never tested? Do you know how hard that is, and to the user they know nothing about it and think it a simple thing?
Do you not know that electronics use math and formulas to work? Do you know that Algebra, Trigonometry, Geometry, Calculus I and II, and Differential Equations as well as Linear Algebra are also not simple but complex that students struggle to try and learn? What about Statistics as well as Finacial math? Not simple but complex. There is a lot of complexity done in computers and programs or apps or whatever you want to call it. To the user it appears simple to those of us who went to college and learned data processing aka information systems and computer science we know how complex a computer is. The Amiga was so good because not that it was simple or played video games, but it could emulate the Macintosh with AMax and eve if it has a slower 68000 than a real Mac the co-processors allowed it to run faster than a Mac with a faster chip in it. End users didn't know how complex emulating a Monochrome PC DOS machine, or a Macintosh was, and only saw how easy it was to do so.
We are getting into the Mobile device age and the Internet of Things age and soon Qunatum computers and the Qubits that will change the way computers work and be more complicated than the X86 PCs or ARM based mobile devices are. The future belongs to the complex design that works better than the simple design.
This is the same mistake that most tech companies make, the people who can debug and write programs who are experts that write complex code, design complex computer systems, and make it so there are fewer bugs and fewer design flaws and save the company millions in expenses for better quality control that needs less help desk hand holding support?
Do you ever notice when these people are fired or downsized that quality control suffers? That the OS and apps get bloated and slow, and suffer more bugs and flaws in it, even hackers stealing data like passwords and email addresses because someone didn't sanitize code because management wanted it more simple than complex. That they hired 20something out of college or dropout people to replace the 30+ or 40+ year old experts for less money.
Sure you could say programmers are a dime a dozen, you get 500+ resumes a day for a programmer's job? You go with the person willing to work for less money to cut costs, but the customer suffers.
Did you know why Apple has been more successful than Microsoft? Steve Jobs learned Six Sigma quality control to make Apple hardware and software a better quality than Microsoft's. Microsoft got rid of the experts that made Windows stable or made a good mobile phone and Vista and Windows Powered devices were awful. Microsoft tried to deny it, but buying a Macintosh or iPhone was better than anything Microsoft put out because of quality control. Without Steve Jobs and his experts at Apple, Apple is starting to suffer as Microsoft had when quality was bad.
Google and Amazon had this problem but found a way to fix it by hiring better experts and quality control people.
So tell me did Evolution and Natural Selection makes a simple human brain or a complex one? It made a complex one that we have problems trying to figure it out how it works, while we try to copy it to an AI program as a series of nodes in a grid or matrix. If the human brain was so simple, we couldn't even figure out how to make computers. Yet because it is complex it is a superior design. So if complex is better, why settle for simple?
Fifteen or so years ago I read someone mentioning that the ratio of processor state transitions per bit of program state was growing almost exponentially.
Anecdote: Starting in the early eighties I started using CAD programs. And they were painfully slow. Yet around 1995 suddenly they weren't 'slow'. That was huge. Since then improvements in processor speed and memory hasn't provided nearly as much functional improvement.
What I think is we're in a world were current processor designs are over kill of much of the programming tasks people need done. What people want is not more speed but better efficiency. That points towards using excess silicon to implement task specific coprocessors, not for more unneeded GPU performance gains.
This leaves Intel in a bad spot. Especially since everyone and their dog is loath to design in Intel parts if they can help it.
It was a bit of an eye opener when I saw an old NT 4.0 server again. I think it had around 500 Mhz and 128MB, i.e. quite a beast for its time. All clicks had immediate on-screen results, a real pleasure to navigate, felt like a 90FPS game. Same was true even for something like iPhone 3GS and iOS3. Nowadays processors are so fast that software doesn't need to be optimized much anymore, and this is what we got. Upside is we can soon have true cross platform GUI apps that are smooth everywhere - until the next big platform like AR comes.
The Von Neumann architecture is dead, IMHO future computing architectures involve many cores, all with local memory (not just a bit of cache), Tensor computing capabilities and very high bandwidth connecting these cores.
Intel has Xeon Phi, but what else are they doing? There is so much opportunity in new computing architectures but it seems like Intel has been taken by surprise. I hope this giant wakes up.
More likely a Harvard machine, i.e. one where the instruction memory is distinct from the data memory.
It is essentially what modern cores have with a their split caches, except those things are called "caches" because the architecture then has a lot of machinery for pretending to be a von Neumann Machine with a huge memory. This pretending is done because that's the kind of machine that software expects.
But the first unices ran on machines with memories only as big as a modern L1-cache. Moreover, networking and parallelism are everyday issues for software now. It will be interesting to see if software evolves to explicitly recognise that it is really running on a network of small machines + a hierarchy of big external storage devices, of which DRAM is just one.
Yes, true, Von Neumann is dead, long live Von Neuman! ;)
The difference is of course that we should not see the whole cluster of cores as a Von Neumann machine, the memory bandwidth is just too low to drive multiple cores with some external memory, memory must be as close as possible to the cores themselves. Quote from wtallis lower in this sub-thread :
> You can't pretend that memory is all equidistant from the processor cores unless you want everything running equally slow.
NUMA is used, when it is actually needed, which is not that often. Most other stuff gets by without requiring NUMA enlightenment (if you think competent parallel software developers are hard to come by... finding competent NUMA people will make you reconsider that assessment).
And NUMA-like architectures on a single CPU die have been increasingly common between Intel's multiple ring busses on larger Xeons and AMD's 4-core clusters on Ryzen. Even per-core L2 caches violate the assumption that a given memory address is equally accessible from any processor core. You can't pretend that memory is all equidistant from the processor cores unless you want everything running equally slow.
I think it goes a bit deeper than that. Intel is losing the power it had as a general-purpose CPU maker. Now that technology and brains are improving, others are figuring out more efficient ways of handling specific tasks that the x86/x64 CPU used to do in an efficient manner.
And intel doesn't have these people. They don't want the embarrassment and are too entrenched in their own processes. The technology as of this year can compete or stomp intel into the ground. We can program ASICs to handle any task, just about as fast as it can handle the electron flow. The only real setback is the fact the instructions are not hard-coded in the actual physical logic. That's literally the only slow-down. Were it not for that translation layer right there, ASICs would come out on top, no problem. Specialization is the future. General purpose was good enough for 30 years, it's time to move on.
An ASIC is an Application Specific Integrated Circuit. In particular, a GPU is not an ASIC. Saying Custom Application Specific Integrated Circuit Processor is doubly redundant.
I wouldn't describe something capable of executing something quite so flexible as shaders/kernels an ASIC. It sounds much closer to a CPU -- designed to execute nearly arbitrary software. And if we're including chips that execute software as ASICs, then it seems to really water down the term to be meaningless.
I don't think so: a GPU is application-specific, (not GPGPU if such a thing really exists), as are other ones. Lisp Machine chips were application-specific. Various application-specific accelerator chips have been designed for FP, video decoding, security etc.
Where you're right is that Nirvana was a chip company founded for this ASIC and I think the term "custom" is misnomer. You could argue that Google isn't a chip company so theirs are custom.
Intel has always been a great research company. They are responsible for OpenCV[1] and largely the entire augmented reality craze is from that sponsored work. They are an important part of technological progression in the last couple decades, they even made Apple sales pick up with intel chips (creating a killer *nix dev machine for a time '06ish) before the iPhone came along.
It would be a shame if the bean counters got them into this with drawing back r&d and are now taking r&d away. The engineers are definitely not in control at Intel today, hard to quantify research projects and developer/engineer outreach to non engineers. These types of moves have been known to kill off companies.
My experience is that also Willow Garage is listed as the main author on many of the (still current) AR tooling, but I don't know the story between them and Intel. It's an incredible amount of open source work that enables the startup I'm doing now, I can only hope to contribute as much back/forward from our company.
I'm guessing these yearly conferences will fade away as Moore's Law falls apart and Intel and others will have a harder time coming up with something new to showcase every year. No longer can you rely on process shrinks to innovate.
If Intel can't offer more compelling improvements in watts per operation, I would be very disappointed.
We know fab sizing is going to stop being worth it. But bigger dies, with better heat dissipation, and processors that better fit today's use cases, all that should be within Intel's capabilities.
> If Intel can't offer more compelling improvements in watts per operation, I would be very disappointed.
There are some pretty hard physical boundaries. Businesses write off their hardware in 3 or 5 years, it's rare to see a machine older than that. But there may come a time when a 10 year old computer is just as powerful as one you buy today. The replacement market is what's driving Intel's revenues for a very large part and if that should ever stop then it probably wouldn't be a great idea to hold a lot of intel stock.
People always talk about Moore's Law falling apart, and it seems like people didn't see it coming. I mean, I didn't, I'm just a guy that reads a lot of scifi. But I always assumed whiz-bang mathematicians had already figured out, I dunno, the threshold at which a processor can be nanosized, or like how big a processor could become before the distances became too great that due to the speed of light further computational advancement wasn't possible. I mean, I know nothing about this stuff, like I said, I just read a lot of scifi and have a high opinion of all the smart folk researching this stuff. Would love to learn more.
> People always talk about Moore's Law falling apart, and it seems like people didn't see it coming.
People didn't WANT to see it coming. The data that it broke were back at 65nm but very much at 40nm and 28nm. RAM hasn't scaled in years.
However, the history of technology is littered with the corpses of those who bet against Moore's Law. Combine this with the fact that your job basically depends upon Moore's Law continuing, and you have something similar to the Wall Street collapse. I can bet against it, but I lose my job if I'm wrong, and I lose my job if I'm right. Better to just close my eyes and cash my paycheck.
For consumer evidence simply look at embedded microcontrollers. Note that RAM and flash haven't been scaling every 18 months for a while.
I see this as a good thing. Now we can finally get down to what we should have been doing in the first place: better software, rather than just more of it and of mediocre quality. Moore's law has bailed out many producers of inferior quality software and now that that free run has come to an end we're going to have to take a really hard look at how we cook this stuff up.
But do you really believe that by taking "a really hard look at how we cook this stuff up" software engineers can double performance (in the sense of effective work) every 18 months? We can absolutely turn the dial toward more effort on software such as algorithms/compiled languages/etc. but color me unconvinced that there's exponential growth possibilities there.
Yes, I really believe that. And the reason why is probably not going to be very popular here but I believe that we took a wrong turn at some point in the past two or three decades that made us concentrate on the wrong thing. In the mid 80's there was a fairly strong push to substantially improve the quality of software, rather than the quantity. And when the web happened that all got flushed down the toilet and we now have about 500 ways to do the exact same thing, none of them very good, efficient or stable.
It's like the world just after the Cambrian explosion. Lots of room for expansion but no real plan or intelligence behind it resulting in a ton of repeat work and variations on themes that will ultimately go nowhere.
And once all that noise has died down the real work can finally begin, much more wood behind far fewer arrows.
I actually hope you're right. As you (approximately) wrote in another comment, "you canna change the laws of physics." CMOS has been a very special technology but it's obviously reaching the end of its life.
There are some exotic processes that give better performance but the economies of scale aren't there yet and the cost of production is probably always going to be much higher than that of Silicon, which is after all a very abundant element on Earth.
There was a fantastic video about IC manufacturing linked here on HN a while ago, I'm not sure if I'll be able to find it.
There's some truth in that. And there are also various approaches that can probably mitigate the end of CMOS process scaling for a while (special-purpose hardware, photonics, 3D stacking, etc.)
Some of these will cause some pain in other areas like software development.
That said, there's absolutely no guarantee that there's a true CMOS 2.0 on the horizon that will provides anything like the approximately 3500X performance gains we've seen from CMOS process scaling. There are huge macro implications if computing basically stops getting faster/cheaper/smaller from year to year.
>People always talk about Moore's Law falling apart, and it seems like people didn't see it coming.
First of all, let's be more precise. In this context, what people mean by the "end of Moore's Law" is the slowdown and, soon, probable end of CMOS process scaling. The issue is that CMOS process scaling has been such an incredible engine for performance that just getting those kinds of performance increases in other ways isn't easy. I wrote a bit about this a year ago.
To answer your question, people did see this coming. There were disagreements about how far down you could economically drive feature sizes so there has been debate about exact dates. But pretty much no one thought CMOS features could be made arbitrarily small.
> But pretty much no one thought CMOS features could be made arbitrarily small.
Pretty much no one qualified, maybe. There are lots of laymen (including many True Believers in The Singularity) who operate under the impression that it's a fixed law of nature.
That's a fin of a modern transistor (Intel 22nm).
The dots in the photo are atoms.
It's fair to say that Moore's law is nearing an end or has already ended.
Atoms are too big, photons are too big, electrons are too big, and the speed of light is too slow. There's no longer plenty of room at the bottom.
Still, it's not like the physical size of semiconductors is the problem. A CPU today is maybe 100mm^2 of silicon. 4U of rack space can easily hold tens of thousands of CPUs, if you can power them, cool them, and connect them up in a useful way.
My point was that a new transistor shrink would give you lower power vs. the same transistor in previously larger node. You get more compute-per-watt with small transistors. If scaling stops, then all kinds of things get more difficult.
I have heard that Electrons move about a millimeter second (although electromagnetic emanations propagate at the speed of light). This is allegedly the benefit of 'optical' computing.
Not quite.[1] Propagation in most interconnects is about half the speed of light, because real-world wires have capacitance. (As low as 25% for CAT 5 cable, as high as 90% for open-wire antenna feeds.) Optical fiber runs about 70% of the speed of light. On-chip interconnects run 30%-60% of the speed of light. So there's some propagation delay improvement with optical interconnects, but it's a factor of about 2, not some huge improvement.
Think outside the box. Current chips have gates on a dozen metal layers measuring ~1µm, but you could scale to 10,000 layers at ~1mm. Sure there are many unsolved challenge to build 10,000 layers, but there is still PLENTY of space for Moore's law to continue in this 3rd dimension...
Yes but that was a cost and engineering issue. The size of atoms is a lot more fundamental. EUV buys you a little more but you still bump into the size of atoms and quantum effects pretty quickly.
> "People always talk about Moore's Law falling apart, and it seems like people didn't see it coming."
EEs in the semiconductor industry have been talking about it for the past 20 years; they didn't know exactly when it would occur but they knew it was coming. It's only software developers who were blissfully unaware.
EDIT: The interesting thing about the end of Moore's Law from AMD's (and everybody who isn't Intel) perspective is that finally the playing field is moving closer to even. Before, Intel always had the most advanced fab processes because of the vast amounts of money they funneled into it, which meant that everybody else had to have a better architecture than Intel chips just to get equal performance. Now that Intel is losing that process advantage, it should become possible for everyone to compete purely on the basis of architecture again.
> "But I always assumed whiz-bang mathematicians had already figured out, I dunno, the threshold at which a processor can be nanosized, or like how big a processor could become before the distances became too great that due to the speed of light further computational advancement wasn't possible."
We're nowhere near the absolute limits imposed by the fundamentals of thermodynamics, quantum mechanics, etc. Those are relatively straightforward bounds to calculate but are completely useless for anything but extremely long-term projections.
What we wish we could compute is what the limits are on current manufacturing techniques and incremental advances from that. But we don't know precisely how many incremental improvements we have left to discover before we need to abandon silicon entirely.
I was doing some back of the envelope math for a blog post last night[1] and it looks like we're not that far away from the limits of what's possible - at least for non-reversible computing. Getting rid of a bit of information as in a Nand get is always going to cost at least 2.75 zeptoJoules and current transistor technology can do it for an attoJoule, so just another factor of 360 to go. Of course then we can try to transition to reversible computing to get around that[2].
A factor of 360 is closer than I would have guessed. But that's still at least 8 doublings of compute efficiency. We've never had concrete roadmaps that far out—that would be like scheduling the introduction of FinFETs while Pentium 2s were first hitting the shelves. Nobody's ever been able to predict that far in advance which fabrication technologies will end up being economical at scale and required at which node. (Just look at how well the industry has coped with having to put off EUV so many times.) With the looming end of silicon scaling, those thermodynamic limits certainly don't look any less out of reach.
If I recall correctly, the lower bound on energy for destroying a bit depends (linearly?) on the temperature. Couldn't performance then be improved by cooling?
I don't think it will matter much though. Whether you have to remove input power as heat or expend power to cool likely won't make a whole lot of difference. Just that the delta-t will be a lot larger and so it may actually cost more to keep that ultra-cool machine ultra-cool.
Maybe future data-centers will be used to pre-heat the water that goes into the turbines that power the electricity plant, in some kind of perverse version of a perpetuum mobile.
You'd need to make up for the difference lost on each cycle with extra fuel.
If we are willing to putter along with no process improvements whatsoever, then yes, we can keep using 5nm indefinitely. And no doubt there will be incremental improvements in performance and yield at that node.
But we can't, and won't stop there to continue to drive down the cost of computing. It is just the end of the road for CMOS lithography.
> But we can't, and won't stop there to continue to drive down the cost of computing. It is just the end of the road for CMOS lithography.
I mean, is there any reason to believe this is actually true? There's no law that just because something is super useful its price will continue to drop forever. Just check out this chart: https://www.nrdc.org/sites/default/files/import/switchboard/.... The blue line is the inflation-adjusted price of electricity by year. I think it's fair to say that electricity is even more vital to the modern economy than compute power, and that having more of it for cheaper would unquestionably raise the standard of living for everyone. There's also a functional and mostly-free market for its production. And yet its real cost has remained essentially stagnant over the last 40+ years.
Now, there are obviously reasons why Moore's law has been a thing for so long (probably a lot to do with the exponentially increasing number of chips we use and the experience curve http://www.economist.com/node/14298944), but the last 50 years in chips may have been more the exception than the rule.
I mean, is there any reason to believe this is actually true? There's no law that just because something is super useful its price will continue to drop forever.
The entire computer industry, well, the entire technology industry is founded on compute power becoming cheaper each year.
What happens to these billion-dollar companies when that is no longer the case? Will Intel's investors be OK with it when they announce that they won't be coming out with anything much better than what they've currently got? Or will they be punished (severely) in the stock market after such an announcement? [1]
The board of directors will respond to pressure from the investors (or get replaced), and will replace company leadership if needed to continue advancement in technology.
And so they (or someone else) will invest in new technologies to move beyond CMOS lithography, such as molecular nanotechnology. Which will disrupt everything else related to technology and biology as well.
[1] I read articles about gamers buying 5-year old Xeon processors for their game machines for $70 USD which are competitive with current-generation i7 desktop processors that cost much more. If Intel can't sell new processors that are effectively better than older ones, that's going to be a real problem for them, and the stock market will eventually notice.
> The entire computer industry, well, the entire technology industry is founded on compute power becoming cheaper each year.
No, we've just gotten used to it. So now, like any junkie with a bad habit we're going to have to get used to doing without that. Or deal with the increased electricity bill.
> The board of directors will respond to pressure from the investors (or get replaced), and will replace company leadership if needed to continue advancement in technology.
Company leadership being replaced is not going to magically change the laws of nature.
At some point even Intel investors will have to accept that there are such things as physical laws and nature doesn't care one bit about your quarterly earnings reports.
Company leadership being replaced is not going to magically change the laws of nature.
Well, that's just it, we haven't hit the physical limits of computing yet. But we are indeed close to the limits of what is practical with CMOS photo-lithography.
At some point even Intel investors will have to accept that there are such things as physical laws and nature doesn't care one bit about your quarterly earnings reports.
This acceptance process will be quite painful, and someone, some way, some how will step in to promise greater returns.
CMOS process scaling has been a pretty amazing unicorn. The fact that neither Intel nor anyone else has unveiled a CMOS 2.0 isn't for lack of research. There are various possibilities but they're either tactical and limited or very much still in the Labs phase.
I agree that the consequences of compute power no longer advancing year-to-year will be significant but I can't agree this is a case of nobody's trying hard enough.
I agree that the consequences of compute power no longer advancing year-to-year will be significant but I can't agree this is a case of nobody's trying hard enough.
I look at these yuuuuge teams at Intel working on their processors, and what kind of returns are we getting on that investment? How much are they, in comparison, investing in molecular nanotechnology related research?
I look at this, and it is mostly software-ish things:
There is some hardware stuff, further down the page, and some talk of the post-CMOS world. But I don't see enough. In my view, they're not placing nearly enough emphasis on the foundational technologies they need for their business.
Not being privy to the details of Intel's R&D budget I don't really have an opinion on how their dollars are allocated. I will say that development tends to benefit from large teams more than speculative future research. I'm sure a very large proportion of their R&D budget goes to where revenue is going to come from over the next few years.
It's also the case that Intel has become less forthcoming on their semiconductor research directions so I wouldn't necessarily expect there to be a lot of information on their website.
Abandon for what? In many series they hand-wave this away using words like "hyperspace substrate" or "dark matter" or "unobtanium." Do we have an idea of what we could use in reality?
Well uh, can you squeeze the atoms closer together? I didn't think they were solid objects, but clouds of electrons? I guess eventually the nuclear power or whatever it is that pushes atoms apart becomes too strong?
Moore's law has long lost its initial indicative power, that implies the actual computing performance goes linearly with the number transistors we have on the chip, and became merely a marketing strategy. Now it is time that marketing value is also fading.
When an ARM chip reaches the performance of a Xeon, it'll draw about as much power as a Xeon. There is no magic - computation has a minimum energy cost.
What can happen is to make chips simpler in that less computation is spent in instruction decoding, tracking, scheduling and more is spent on actual execution.
Back in the 80s, instruction decode was a large part of the logic in a CPU (thus the motivation for RISC). Currently, it's a tiny fraction. It's been many years since a simpler instruction set was useful for reducing the complexity of the CPU.
But that portion of the power budget hasn't shifted at all back toward the computational units. It's been taken over by register renaming and instruction reordering and all manner of caches.
16 registers is not a lot when compared to other architectures. POWER, SPARC, Arm64 and MIPS have 32 (SPARC is weird, but 32 are always visible). Itanium has 128.
I'm far from an expert on CPU architectures, but I suppose there are diminishing returns. Most of my functions use less than 16 values, and those that do may well iterate over more than 128.
Also you're probably aware that modern CPUs have many more physical registers, they just don't expose them all at the same time.
E.g. AMD Zen physically has 168 integer and 160 floating-point registers. Of which you can only use 16 at a time, but to my uninformed eye that looks like a reasonable trade-off.
If you had a "sufficiently smart compiler" you wouldn't need register renaming and instruction reordering, but such a compiler has consistently failed to appear. That's a big part of the whole Itanium fiasco.
If you want your CPU to run fast, you have to pipeline instructions and you need caches that can run at full CPU speed. It's easy to design a CPU without all the complexity, but it will be slow. No one knows how to do both simple and fast. It's probably impossible.
I would think that, nowadays, reading and writing memory are major bottlenecks, too, to the extent that spending time decoding instructions can be a gain if it allows for a denser instruction stream.
For machine learning applications, I don't think the end game is to have complex CPUs, though.
Assuming that brains have managed to find more than a local optimum and that our understanding of them is somewhat accurate, ditching all those caches, translation buffers, etc. most of the bus bandwidth, and moving computation towards memory is the way to (eventually; we need to learn a lot before that's feasible) go for machine learning applications.
Actually there is plenty of precedent for that conclusion. Scaling CPU cores up (=efficient but high performance cores) is super-hard -- making low-power cores is pretty simple in comparison --; almost everyone fails or failed at it. Currently there are two companies on the planet that do that sort of thing, and not so long ago it was only one. Notable names that failed hard in this are: Intel, DEC, Sun, Fujitsu, AMD, IBM, HP, Intel, as well as SGI, IBM and AMD.
It's not unlike designing a race car. You can put a monster engine, but it'll add weight, require more fuel, add inertia which will demand a more complicated suspension and wider, heavier tires to be able to do fast curves, and so on.
The careful balance of every aspect of a modern CPU is an art very few people practice. I'd say IBM and Sun have't left this game just yet for very high performance platforms, but don't expect a Core i3 coming out of either.
True, IBM and Fujitsu/Sun are still competitive in some niches, but not on power efficiency and not for general purpose application. Last time I looked IBM was 3-5 times worse perf/Watt in SAP benchmarks. Of course IBM is still an option in these specialized applications if you just need that raw power, but no one's going to run a data centre on that silicon.
If everything gets cracked to micro-ops anyway, how much effect does your general instruction(not SIMD/Altivec/Thumb etc) set _really_ have on performance and power consumption?
Power goes as C v^2 f. At best. That doesn't change.
If you look at a particular technology node, one of the best correlations of power consumption is chip area. It's pretty much a straight line.
Now, that has probably changed a bit with how aggressively we turn chip areas off nowadays. So, we probably have to alter that to power consumption vs active chip area--but it's still a fixed line for a technology node.
> Whose only competitor is ARM, which is little better in terms of decoding complexity.
T32 indeed has this problem, but not A32. With ARMv8 ARM released the A64 instruction set, which is designed new from ground up and is to my knowledge also not hard to decode. Nevertheless decoding complexity is not that relevant anymore. What is much harder and involves more die area is (super-)pipelining the execution, out-of-order execution etc. But even all this together: What consumes most die area are typically the caches.
Caches are transistor-dense, it's hard to optimize them further. Maybe something like Transmeta's architecture, a hybrid software/hardware approach would yield some improvement.
But these money are tiny compared to the Impact they will/should get from AMD Ryzen.
To remain price competitive with AMD Ryzen, Intel's Gross margin will likely take a dive from the current 60% to below 50% over the next few years. The Data Center Group represent 30% of the Revenue, and my guess it represent 60%+ of the profits.
OpeX is increasing, R&D required for each node is increasing. They are not in Smartphone, they are not opening up their Fab. Basically their future looks pretty grim to me. They wont disappeared all of a sudden, they will likely have 3 to 5 years more time to figure it out.
But, again none of this has to do with Intel withdrawing from so many project. I cant believe saving money from these event / project are the motives.
I question how much pressure intel really feels from AMD.
Intel: 60b in revenue, of which over 50b is from processors.
AMD: 4b revenue. It's impossible tell what part of that is ATI and processors... since AMD mixes desktop cpus with ATI revenue; and mixes server cpus with embedded and soc revenue. So they're playing a bit of a game to hide their cpu sales. If we assume 1/2 is from cpus, that's 2B.
Does Intel really feel pressure to reduce their prices because of a competitor that sells (perhaps) 1/25th of their revenue?
Well, anyone that's going to build their own PC in the near future is going to put Ryzen in there. The only hold Intel has over the desktop market comes from pre-build systems. Those are probably the majority, but if some of them start budging, that market might flip faster than you think.
I just built a new PC and put an i7 in it. The Ryzen 1800x is more expensive than an i7-7700k, while having worse performance.
Obviously AMD makes cheaper versions where that comparison doesn't hold.. but the advantage for AMD here isn't clear cut, and so there's no reason to believe there will be a mass migration to AMD.
Besides I've heard this kind of rhetoric about AMDs cpus before.. and yet I've never seen the sort of switch like you're describing. If it were true that everyone was switching to Ryzen CPUs, they would be sold out everywhere and AMD would be talking about how to scale up by an order of magnitude to meet demand.. none of that has happened.
AMD did a good job with Ryzen, and they'll probably post some great numbers next quarter... maybe they'll get to 5 or 6b over the next year... but Ryzen hasnt changed the selling proposition for AMD. It is still: in the low to mid end desktop processor market, AMD is cheaper and has similar performance.
I'm not a Intel or AMD fanboy by any stretch (only ever built with Intel), but I don't know what benchmarks you've been reading and I've read a lot and you'll have to clarify what you mean by worse performance.
In any multithreaded application the Ryzen 1600(x) are just as good if not better. The 1800x to 1700 are even more multithreaded performance and the 1700 is priced a little cheaper than 7700k and able to be OC to the same performance as the 1800x (the entire Ryzen lineup seems to be capable of the same OC, but also capped pretty heavily). The only place that is showing Intel winning are in single threaded scenarios and in gaming scenarios. The gaming scenarios are interesting as one of the more recent benchmarks I saw (https://www.youtube.com/watch?v=3VvwWTQKCZs) was showing in many cases the worse case FPS is better than the 7600k. Additionally, several games have received engine updates that seem to put Ryzen on par with Intel now.
Yes, you are right that the 1800x has better multithread performance.. In my workload, the single thread performance was what mattered, so that's what I paid attention to.
I went the other way with the 1700. Though I do game it's not my main motivation. This is a workstation first and foremost. And every benchmark I saw the 7700K got crushed by the 1700 (in linux productivity benchmarks).
If you are gamer, the 7700K is the right choice though.
The fact that there are some workloads that amd is good for and others where it falls short only reinforces my point.. which is that the selling proposition for amd hasn't changed.
They haven't unseated intel with that strategy in 40 years... and they aren't going to do it today either.
Ryzen is a good start. But to unseat intel they needed a clear performance advantage and/or additional products that match intels other major product lines with similar or better performance.. and demonstrate they can do that over the long term.
Custom built PC is a small slice of a shrinking market. Until AMD recaptures the server and OEM markets they won't be unseating Intel anytime soon, and they just don't have the resources to get started yet.
> Well, anyone that's going to build their own PC in the near future is going to put Ryzen in there
I think you overstate success of Ryzen. It's only clearly better in price/performance ratio of you compare it to overpriced Intel's top monsters. There are other processors from Intel which are comparable to Ryzen, plus the question of multithreaded/singlethreaded performance, whichever you need more.
It's not necessarily AMD or something new. Last year I was wondering why there was no party. In 2015, they had a big one, with a couple of trendy bands on stage. Somebody has probably been looking at return on investment for these events for at least a year or more.
To be fair, IDF was all over the place. I suspect I'm not the only one who felt that only a fraction of the talks were relevant to my interests. On the other hand, it was great for networking.
I used to attend IDF regularly and, while larger shows are always a bit of a grab bag, I do think that it used to have a more coherent identity than it did the last time I went a few years ago. It probably doesn't help that a lot of IDF talks are very low-level so if you're not directly involved, you're likely to be completely uninterested.
As shows get bigger, there's a definite tendency for them to get more diffuse. There are a lot of economic incentives to grow, add a broader range of partners, etc. And before you know it they're about everything and nothing. Vendor shows have some natural resistance to getting too diffuse but there are still a lot of events I attend and I'll see some booth and think "What the heck are they doing here?"
True. That's the main reason, for example, that I didn't get a ticket to I/O. GCP Next had a lot more topics relevant to my interests, despite it having a more "commercial" or "salesy" feel to it. I/O seems to be mostly about Android and Firebase these days.
That's disappointing. It was a useful technical and marketing event to learn about a variety of Intel technologies, some I wouldn't have otherwise been exposed to, and certainly not had a chance to talk to the engineers. I'd rather they moved it to somewhere cheaper than to cancel it.
I don't care what GPU my mobile phone runs. It's fast enough, I'm ok with it.
I also don't care about servers. I'm not a dev-ops/admin person.
On my laptop/desktop, where I DO care, I don't see Intel going away anytime soon.
Even if we switched to some ARM devices, it would be a regression (if not for anything else, for having to run most Windows/MacOS stuff under some kind of Rosetta-like interpreter for many years).
Besides, as soon as ARM CPUs approach the limits of various manufacturing processes, they will face the same issues Intel does. Moore's law is not coming back.
Dunno if you've been to an IDF, but I'd say that IDFs have fulfilled their function and are no longer needed. I went to the Skylake IDF and after a very predictable presentation there was an opportunity to ask questions. It went roughly like this:
What time is it?
The question was what time is it. Intel is an industry leading leader committed to developing customer solutions. We are not disclosing what time it is now. We may be making announcements related to time in the future.
This cost me a day. On the plus side of the ledger, I like Intel documentation, especially their Optimization Reference Manual. But I don't need to go to IDFs anymore and now I don't have to.
An industry analyst of my acquaintance made a similar comment to me. He said that Intel has become significantly less willing to disclose their future plans with developers and others. He also said that there seems to be diminished interest by developers in going to an Intel-centric show.
A show like IDF clearly makes less sense if you're increasingly unwilling to say much about future directions. It's also entirely possible that the projections for event sponsorships, etc. weren't looking to be where Intel wanted them to be.
I think it's better for them. The IDF was used to showcase new products. If they have no new significant products to show, it's better not to summon anyone instead of getting the flak for introducing only minor evolutions as it has happened in the past few years with the (dying?) tick-tock model.
Don't try to make too much of this. I had been working with Intel since December on the issues of IDF. The vendor was not performing. They had no website up and emails and calls were not returned. Also, when I finally did reach the vendor, I asked them how they were going to handle the visa logistics of China/Asia IDF attendees coming to the US. I asked them if 2-3 months would be enough to get Visas approve with the Trump Administration. A few days here we are with the cancellation. This mess is purely Intel's fault. I even emailed Krazanich about putting more eyes on this. But's let's move. I'm heading to Ignite now....
Ask yourself what use you have for an FPGA on the desktop that you couldn't use the GPU for. Fact is, your desktop will include a GPU anyways. So that FPGA will not be in lieu of but rather in addition to.
So this will only change when either of a couple things happen. One is demand side: a killer application on the desktop which requires an FPGA comes along and drives demand. The other is supply side: the demand for CPU+FPGA is so great from Amazon+Microsoft+Google that chip manufacturers just supply it in desktops for 'nothing'.
An example of the demand side is game graphics. I don't need this but a lot of people do and then my UI graphics get better.
An example of the supply side is that I don't really need cryptographic grade random number seeds, RDSEED, but I get it for free because someone who buys a ton more than I do does need this.
Yeah, I was aware of this, I did mean for a desktop. But if I want to get this, would it come with all the software tools and whatnot? I have no idea what tools it would need or whether they need more money to compile code etc...
Not before mainstream software supports it. We had 64-bit with Alpha, MIPS, SPARC, but 64-bit x86 only happened when it could run 32-bit x86 code flawlessly and it only got mass adoption when Windows went 64-bit.
Sorry. I was comparing both sides as an analogy why FPGA's won't be available on mass-market CPUs anytime soon.
The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point. Java was Sun's attempt to make SPARC viable by breaking with the ISA compatibility problem.
Today, with Linux, JVM, .NET Core and interpreted languages running a lot of the server workloads we have, it'd probably be a very different story.
When compared with the other 64-bit architectures we had (I forgot IBM's z/Architecture) amd64 is still an awful register starved overcomplicated architecture.
>
The reason Itanium never achieved the mass acceptance Intel expected is because, even with Windows running on it, it never ran x86 software at a reasonable price/performance point.
That was one (and surely important) reason. There were lots of others reasons
(seriously: everybody interested in the history of Itanium should read this text), for example:
"Davidson also pointed out two areas where academic research could create a blind spot for
architecture developers. First, most contemporary academic research ignored CISC
architectures, in part due to the appeal of RISC as an architecture that could be taught in a
semester-long course. Since graduate students feed the research pipeline, their initial areas of
learning frequently define the future research agenda, which remained focused on RISC.
Second, VLIW research tended to be driven by instruction traces generated from scientific or
numerical applications. These traces are different in two key ways from the average systemwide
non-scientific trace: the numerical traces often have more consistent sequential memory
access patterns, and the numerical traces often reflect a greater degree of instruction-level
parallelism (ILP). Assuming these traces were typical could lead architecture designers to
optimize for cases found more rarely in commercial computing workloads. Fred Weber echoed
this latter point in a phone interview. Bhandarkar also speculated that the decision to pursue
VLIW was driven by the prejudices of a few researchers, rather than by sound technical
analysis."
We only got x86 Intel 64-bit CPUs when AMD did AMD64. Intel was trying to get everyone to go down the Itanium route but AMD forced them to do their own x86 64-bit extensions.
If tomorrow IBM came out with a POWER8 box at a price point competitive with my Xeon E3 workhorse running full Fedora 25 or Ubuntu 17.04, I wouldn't think twice. Same goes for Oracle and SPARC. The lowest POWER goes is in the mid E5 range, which I can't justify for my home office.
Yes, the Naples 32 cores/64 threads powerhouse is what's dangerous to Intel, especially at its performance level.
(datacenter is where Intel probably makes most of its profits, and Naples is eating right into that market)
According to articles on Forbes and Extremetech, Intel currently has 99% of the server market. This is a new product that may affect Intel, but it hasn't done anything yet. So far this is just speculation then.
It hasn't done anything yet because it hasn't been released yet. So of course it is speculation. However, based on the downclocked Ryzen benchmarks I have seen, it should significantly outperform anything Intel has in Perf/W at the 5W/core level. And Perf/W is what datacenters care about.
Is that the case? From the benchmarks I've seen, they're not slower. They might be slower for single-core video game performance, but you need to spend over $1000 on Intel to compete with the $500 Ryzen on workstation performance. I imagine most companies care more about workstation performance.
The Naples (server version of Ryzen) has more memory BW, more cores, and more PCIe lanes than Intel's Xeons, and threatens their data center hegemony when it is released.
