Right. The real jump from small to large RAM devices is the presence or absence of DRAM.
Large SRAMs get costly and power hungry quick - the largest RAM Cortex-M4 devices have about 192KiB of SRAM, but cost $6-10. The jump to DRAM, however, is very expensive, because DRAM is fabricated on a different process and needs to be installed as a separate die or package. It is also too high latency to use as the only RAM, so a SRAM cache is still necessary.
The market currently segregates a lot of other features based on the RAM interface. Cortex-M series cores, sold as "microcontrollers", almost never have DRAM, only support Thumb-2, and have no MMU. Cortex-A series are sold as "application processors", have external DRAM interfaces, and include a MMU. A similar divide is visible with the MIPS architecture.
I'm starting to see more and more Cortex-Ms with DRAM interfaces. STM32F427s added them to their FSMC peripheral (their new discovery board has 32MB of DRAM actually).
NXP's LPC line of microcontrollers are M3 or M4-based and have external SDRAM interfaces that work pretty well (no high-speed layout necessary). They've been around for a while.
Large SRAMs get costly and power hungry quick - the largest RAM Cortex-M4 devices have about 192KiB of SRAM, but cost $6-10. The jump to DRAM, however, is very expensive, because DRAM is fabricated on a different process and needs to be installed as a separate die or package. It is also too high latency to use as the only RAM, so a SRAM cache is still necessary.
The market currently segregates a lot of other features based on the RAM interface. Cortex-M series cores, sold as "microcontrollers", almost never have DRAM, only support Thumb-2, and have no MMU. Cortex-A series are sold as "application processors", have external DRAM interfaces, and include a MMU. A similar divide is visible with the MIPS architecture.