NAND flash is so-named because of its physical resemblance to a NAND gate, but I don't think it actually functions as a NAND gate.
Put another way, is it possible to feed two 16-level signals (X and Y) into a QLC and get a 16-level result back out of it (Z), where Z = X NAND Y, and if so, is it significantly faster, smaller, or less power-hungry than 4 conventional NAND gates running in parallel? I don't think so.
As it stands, NAND flash cells are only used for storage, and that's because of their high information density, not any computational benefits. Once the signals leave the SSD, they've already been converted to binary.
> is it significantly faster, smaller, or less power-hungry than 4 conventional NAND gates running in parallel?
It's not implemented any one of these several manners just for the hell of it. Everything has tradeoffs (which vary with each manufacturing node, architecture and timing in the market price landscape). The engineering and product management teams are not throwing darts. Most of the time anyway.
Saying that it's still binary because you feed binary into the chip and get binary back is moving the goal post (imo). A multilevel subsystem in a larger one is still multilevel, an analog one is still analog, an optical one is still optical (see switching fabric recently.)
So anyway, the russian systems did explore what could be done. The flash storage does answer some favorable tradeoff. And so have countless university projects. Including analog neural net attempts.
The second half of that question is not relevant if the answer to the first half of the question is "no" (it wasn't rhetorical). QLC "NAND" is not a logic gate, it is a storage mechanism. It does not compute anything.
Modern magnetic hard drives use all sorts of analog tricks to increase information density but few would seriously argue that this constitutes a fundamentally different kind of computing.
Yes, QLC (etc.) is an innovation for data storage (with tradeoffs). No, it is not a non-binary computer hiding in plain sight.
Fair enough. Common examples in storage and transmission. Not so common in computing for now. The closest obvious computing example, to my mind, is analog neural net blocks meant to be integrated in digital (binary) systems. Not ternary, old school (hah!) analog.
Put another way, is it possible to feed two 16-level signals (X and Y) into a QLC and get a 16-level result back out of it (Z), where Z = X NAND Y, and if so, is it significantly faster, smaller, or less power-hungry than 4 conventional NAND gates running in parallel? I don't think so.
As it stands, NAND flash cells are only used for storage, and that's because of their high information density, not any computational benefits. Once the signals leave the SSD, they've already been converted to binary.