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Notch succeeded in creating an absolute clusterfuck of an ISA in his new game (fail0verflow.com)
16 points by unkoman on April 9, 2012 | hide | past | favorite | 7 comments



I am amazed at all the passion that 0x10c has generated, whether among folks who have immediately started implementing VMs, assemblers, compilers, and such, or among folks who dislike Notch for whatever reason, not to mention everyone else in between.

The headline here, incidentally, is a little inflammatory and doesn't reflect the article's polite and technical tone. That's unfortunate, because the article itself is worthy of a read.


unkoman, don't editorialize headlines.

Who says that all new architectures must be easy targets of C? Perhaps this is part of the fun.

I am convinced that alternatives to C will produce much more compact programs.

I am enjoying the rash of assemblers, compilers, emulators that this architecture has generated. It is tickling an key aspect of hacking that has been underrepresented here on HN.


Pretty long way to rant about how hard it will be to write a C compiler for it :-) I'm guessing that ships with high level language code will under-perform hand coded ships but that is just a guess.

It is interesting to read this guys rant though, he has used PICs (he should also check out the 8051 or 8048 some time) so clearly he knows that an instruction set architecture (ISA) can be successful even if it is hard to make a C compiler for it, not everything is a PDP-11.

The rant about bytes was particularly amusing, dealing with 'odd address' errors on the PDP-11 wasn't fun. But the DEC-10 architecture (36 bits) had a really interesting 'byte pointer' kind of thing where there was a way of iterating over 'strings.' (They also had SIXBIT a 6 bit encoding standard for text, go figure, and SKIPE which was in instruction that never skipped (thus a NOP)).


Hmm not convinced its so bad.

The 16bit-ness seems hardly a problem.

The overflow thing seems a hassle.

Forth cries out.

Lets remember what this CPU will be used for - it'll be a way for the programmers to optimise their space-ships, and everyone else will have to cut-n-paste the scripts they find out there.

So someone port factor...


Agreed. The 16-bit char won't be a problem because this isn't really a "general-purpose" CPU. It will only be used in one game! "Eight 16-bit registers are also not enough to perform 64-bit operations entirely in registers." The whole premise of the game is a mistake manipulating 64-bit numbers. The author talks as if this were physical hardware used in production systems. And the section on timings completely ignores that fact the Notch pulled some numbers out of thin air.


I haven't programmed for the "CPU" but I'd wager that certain things are designed to be slightly difficult for the sake of game difficulty and the inherent fun of pulling off something non-trivial with it.


From a game design sense, there are actually pretty good reasons for making the architecture somewhat hairy. If it's an ideal candidate for C, writing a new backend for a popular compiler is a few weeks of work at most, and then much of the motivation for dealing with the gritty details of the ISA evaporates. As we've already seen, there will be C compilers available for the DCPU-16, but there are enough tough nuts to crack that programming in assembly (or Forth?) will provide a competitive advantage for some time to come.




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