With each recent node step, you basically get +10-15% clockspeed or -30% power consumption. They just blew their entire node on a small clockspeed ramp.
Now, if they want a wider core for M4, that means more transistors and more heat. They are then forced to: not go wider, decrease max clockspeed, hold max clockspeed for a pitiful amount of time, or increase power consumption.
On the whole, I'd rather have a wider core and lower clockspeeds then turn the other power savings into either battery life or a few more E-cores.
Now, if they want a wider core for M4, that means more transistors and more heat. They are then forced to: not go wider, decrease max clockspeed, hold max clockspeed for a pitiful amount of time, or increase power consumption.
On the whole, I'd rather have a wider core and lower clockspeeds then turn the other power savings into either battery life or a few more E-cores.