On: Intel x86 documentation has more pages than the 65...

[larschdk]

No division, no floating point, only 8-bit multiplication and addition, no pipeline, no cache, no MMU, no preemptive multitasking, very inefficient for higher level languages (even C). But you would get about 450 of them for the number of transistors on a 486.

[Findecanor → larschdk]

Multitasking is tricky because the stack pointer is hard-coded to use page 1. it could be moved first on the 65EC02 and on the 16-bit 65C816.

In a code density comparison, the 6502 is as bad as some RISC processors where instructions are four bytes instead of one. <https://www.researchgate.net/publication/224114307_Code_dens...>

But it was fast, with the smallest instructions taking 2 cycles (one to read the op-code, one to execute). A 1 MHz 6502 is considered on par with a 3.5 MHz Z80, overall.

[cbm-vic-20 → larschdk]

The 6502 does not have any multiplication instructions. It does have very fast interrupt latency for the processors of its time, though.