A couple of AI hype cycles ago, everyone was abuzz about genetic algorithms. I recall a cautionary tale that was related about someone using FPGAs to do genetic algorithms.
After a while they noticed several disturbing things. One, that the winners had fewer gates than theory thought was necessary to solve the problem. Two, some days the winners didn't work, and three, sometimes the winners didn't work on a different FPGA.
After much study the answer was that the winning candidates were treating the gate logic as analog. Manufacturing flaws or PSU fluctuations would result in the analog aspects behaving differenty.
To fix this, they split the fitness test in two passes. All implementations that actually worked got re-run in an emulator, which of course treats the behavior as purely digital. Only if they worked with both did they avoid being culled.
Iirc there was a somewhat famous case where the design involved some gates that were obviously not connected to the rest of the logic. But if removed the results were different. Iirc the explanation was that the genetic algorithm created an oscillator circuit that became part of the program.
After a while they noticed several disturbing things. One, that the winners had fewer gates than theory thought was necessary to solve the problem. Two, some days the winners didn't work, and three, sometimes the winners didn't work on a different FPGA.
After much study the answer was that the winning candidates were treating the gate logic as analog. Manufacturing flaws or PSU fluctuations would result in the analog aspects behaving differenty.
To fix this, they split the fitness test in two passes. All implementations that actually worked got re-run in an emulator, which of course treats the behavior as purely digital. Only if they worked with both did they avoid being culled.