Can you do it in 1000 logic gates, in a size of 150 x 170 um?
There are very few things that are more complex than toys which fit in that space. It's primarily a learning opportunity, not a hack to build a product.
Also, most of the hard work in Wi-Fi and GPS modules is not in receiving the binary radio signal but in the protocols to decode it. For wifi, the 802.11 protocol would require your PHY to provide at the very least the orthogonal frequency-division multiplexing, but you're probably expecting something closer to a Wiznet chip that provides the fundamental stack available from eg. the lwIP project.
Yeah this is a hard limit - but also in the TT2 world it multiplexes its pins between TT projects through a scan chain - this effectively means that update times on pins are in the sub MHz domain - so anything you are building will be slow. Also there are only 8 input pins and 8 output ones (and 2 of those input pins are reset and clock, so really 6 input pins).
As I understand it there will be a TT3 and the way pins happen will likely greatly change - more pins and faster everything
Well, the question was: can you do analog designs? Designing your own transistors, not relying on logic gates library. That's what full custom means.
That opens the door to less conventional stuff, such as CMOS imagers, memories, RF/Analog designs, etc. Obviously the available space and I/O are going to be limitting factors.
Regarding Wi-Fi, I was thinking of some of the RF frontend for a project such as [1]. I am not extremely knowledgeable about RF, so that would be a learning opportunity. I imagine it to be mostly carrier generation and multiplexing, the higher layers are doable on an off-the-shelf FPGA.
That said, Wi-Fi is a simple target, but maybe not the most interesting one. That's the first full-custom application example I thought of.
Can you do it in 1000 logic gates, in a size of 150 x 170 um?
There are very few things that are more complex than toys which fit in that space. It's primarily a learning opportunity, not a hack to build a product.
Regarding the other comment about there only being 14 pins, if I was determined to try putting an early CPU replica in there, I would try multiplexing the pins. The 4004 is already in a 16-pin package, with 2 of those being power and ground.
I built a 4-bit 4004 equivalent for TT2 and then an 8-bit equivalent - sort of 8051 level sort of stuff - quite doable, the hard bit is the tiny bus interface
There are very few things that are more complex than toys which fit in that space. It's primarily a learning opportunity, not a hack to build a product.
Also, most of the hard work in Wi-Fi and GPS modules is not in receiving the binary radio signal but in the protocols to decode it. For wifi, the 802.11 protocol would require your PHY to provide at the very least the orthogonal frequency-division multiplexing, but you're probably expecting something closer to a Wiznet chip that provides the fundamental stack available from eg. the lwIP project.