Author here. I've commented on SSA and simulations (in the context of gamedev) elsewhere in this thread.
Regarding phi nodes, they represent a "merge" of two possible execution branches. In C++ you evaluate one side of the if() branch and ignore the other based on the predicate and the "phi" (sometimes called "phony") function then copies the result from the selected branch to the new SSA variable. In a language like Verilog, you evaluate _both_ branches and the phi node is effectively a "mux gate" that selects between the two branch results based on the predicate.
Regarding phi nodes, they represent a "merge" of two possible execution branches. In C++ you evaluate one side of the if() branch and ignore the other based on the predicate and the "phi" (sometimes called "phony") function then copies the result from the selected branch to the new SSA variable. In a language like Verilog, you evaluate _both_ branches and the phi node is effectively a "mux gate" that selects between the two branch results based on the predicate.