Hacker News new | past | comments | ask | show | jobs | submit login

I suspect some heavier lifting is done here:

    use ieee.std_logic_1164.all;
    use ieee.numeric_std.all;
It looks that the VHDL source is about instruction decoding, registers, etc, but does not include things like ALU logic. (I don't know VHDL actually.)



Those two lines are just the VHDL equivalent of #include <stdio.h> - i.e. boilerplate that you'll see in almost every source file.

But it's true that you don't have to describe the ALU down to the bit level - thanks to those two lines you can say "q <= d1 + d2" instead of having to build an adder at the gate level. (Though you can, of course, do that if you really want to!)




Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: