On: The Problem with RISC-V V Mask Bits

[freemint]

I know of a lot of embedded designs which do not do register renaming.

[hajile → freemint]

I doubt any of those are implementing vector instructions. If they do, then renaming is a relatively small addition in comparison.

[freemint → hajile]

Vector instructions are replaced with DSP instructions for embedded applications. Ne speculating SOC with DSPs seem pretty standard?