They're definitely considering both directions for the total bandwidth number.
But I don't think that's what's happening with the gigatransfers. When they launched 5.0, they were clearly counting one differential pair of pins: "Delivers 32 GT/s raw bit rate and up to 128 GB/s via x16 configuration"
But my point is, even though they were already doing that, they were claiming 32GT/s last generation. But it's 64GT/s now. I don't think that's counting more pins, I think they're saying that each transfer is two transfers.
https://pcisig.com/blog/pcie%C2%AE-60-specification-released...
> a maximum bidirectional bandwidth of up to 256 GB/s for x16 lanes