Since a lot of the distinctive sound of a SID comes from the analog components which still need to be emulated in a FPGA solution does an FPGA solution really get closer to the sound of an actual SID than a quality software emulation?
FPGA does not really offer advantages of accuracy, though it does offer advantages in time precision. This is important when putting it inside a C64. Of course a much faster CPU can also be used to handle real cycle accuracy in sync with the original clock.
Part of the sid sound comes from the non-linearity due to approximation in its design. For example the state variable filters are very non-linear on the 6581. It even differs significantly from each individual chip to chip[1]. The best software models I'm aware of are in residfp[2] and jsidplay[3]. After some work in octave I found the filter model can be recreated without the large lookup tables used in this software.
Of course getting the digital part correct is also important. There is a lot of documentation on this resulting from the decap [4].
Some features like bitfade, multiple driven bits in the wave corruption etc do not translate well to FPGA. They can be approximated with timers and lookup tables.
