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Would you mind elaborating on the math of how the "top 2b" ends up burning 3/4 of the single opcode instruction space?



Each bit used halves the potential encoding space, e.g. 2^32 -> 2^31 possible instruction encodings.

For thumb, 32-bit instructions can be allocated up to 3/32 of the potential 32-bit space, and 16-bit instructions can use 29/32 of the 16-bit space (3 of the potential 5-bit opcodes denote a 32-bit instruction.) Which is probably a better ratio than 1/2 or 1/4 of each, for instance. Though I'm not sure how much of that encoding space is actually allocated or still reserved.

Related, I believe ARM has allocated about half of the 32-bit encoding space for current A64 instructions.


Further, if you want single-byte opcodes, then you took that space from 256 opcodes down to 64. It cost you 192 single-byte opcodes to use a 2b marker. This wouldn't be possible with the current x86 encodings [1].

[1]: https://www.sandpile.org/x86/opc_1.htm


Ah OK, I think I understand now. You are specifically referring to the ARM Thumb instruction set as an example of this encoding scheme in both your comments?




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