If you want a great introduction to, and appreciation of, SoCs — given the announcements yesterday and to understand what goes into something like the M1 a little better.
However, there is one thing is regrettable to me in lectures that talks about the micro-architecture of superscalar processors: they never talk about the register bank micro-architecture. The focus is always on the micro-architecture of the compute units.
Knowing that the wire area of a conventional register bank grows by the square of the number of read/write ports, and that superscalar processors require an increasing number of read/write ports, the micro-architecture of the register bank quickly becomes critical with the number of issue.
But there is very little information on the right micro-architectural strategy in this regard.
There is some information on GPU register banks, but very little about modern CPU designs.
