There are so many cool 801 stories (like why 801? The building it was designed in was number 801).
My favorite feature was this: stack frames were cache aligned and the line under the stack pointer would be marked valid upon entry of functions (so the storing the callee saves wouldn't bring in a line that would be overwritten anyway) and invalidated upon exit (so the cached wouldn't have to write back stale data). As he said, this effectively enabled them to treat the cache as an extended register file. Strangely nobody has copied this idea.
There are great stories about the development, but very little other detail is available and AFAICT, very few were actually built. 801 was not a single chip design and RISC didn't become an overnight success until it was built in a single chip (which enabled much higher frequency and was the true key to success).
ADDED: Also, their simulator had a neat trick to make it fast: all I$ lines had an 8X (IIRC) shadow where for each fetched instruction there would be a short sequence of host instructions emulating it. Thus to simulate an 801 instruction they would just ensure the line was fetched and branch directly to the corresponding address in the simulation cache which could fall through to the next instruction until either a branch or the end of the line was reached.
Thanks for providing these interesting details! Is there any documentation on these features?
I found a reference to the simulator trick in CHM's "IBM 801 Microprocessor Oral History", but I would love to see more detailed design documentation on the CPU and simulation. The documents available on bitsavers unfortunately are not that detailed.
I don’t mind the name “RISC” but the term “CISC” always seemed inappropriate. It sort of implies that there are or were competing schools of thought around processor architecture when in reality so-called CISC represented an earlier trend and RISC represents a later trend.
Neither trend were very intentional by their designers (e.g. why would anyone intentionally make their processor “complex”?) but instead were consequences of the technology available at the time and were simply the most reasonable ways to go about things.
So called CISC designs emerge from a time when assembly programming was widespread, RISC came about once compilers were in widespread use. Reasonable engineers with constraints from both eras were focused on producing highly efficient designs.
Which is why the term “CISC” rubs me the wrong way. I almost have to wonder to what extent this naming was subversive product marketing leaking into academia.
Of course today we have the hindsight to see that the constraints of contemporary processor design requires a significant amount of design elements from both RISC and CISC methodologies.
Sure cisc as a term was invented by risc. But non-risc (better term?) and risc have coexisted for 30+ years with no sign of x86 fading, and a new type of succesful non risc architectural style, vliw, has come about.
CISC designs have largely faded, in fact, since the beginning of the 32-bit era. Contemporary X86 is internally a RISC design. Not to mention all contemporary so-called RISC processors (power, arm) have hundreds of instructions and plenty non-risc style instructions.
Re your second point:
CISC and RISC are primarily characterisations of the instruction set architecture, not microarchitecture. (And of course this microarchitecture level translation was done with microcode already long before RISC was invented. )
Is he though? Or is this IBM's desperate attempt to claim some experience relevant to ARM now that they killed PowerPC? I mean, its four paragraphs under history before we get to this guy on wikipedia.
It's harder to imagine coming from the IBM of today, but historically the company has earned many laurels from its numerous important contributions to computing. As my computer architecture professor used to say, "everything that's worth inventing already has been at IBM." In addition to RISC, they created out-of-order, superscalar processing, relational databases, TCM, magnetic hard discs, DRAM, etc.
IBM Research also supported a number of first rate scientists. Just a couple of the better known names: Mandelbrot and Landauer worked there, and Charles Bennett still works there I think.
Cuprate superconductors were discovered by Bednorz and Müller at IBM in Zurich in 1986. They got the Nobel for it the next year. The physics Nobel the previous year also went to researchers at IBM Zurich, for the invention of atomic force microscopy.
Did you read your link? Even that article says the IBM 801 is considered to be the first RISC. And since you're citing Wikipedia, look at the entry for Cocke:
My favorite feature was this: stack frames were cache aligned and the line under the stack pointer would be marked valid upon entry of functions (so the storing the callee saves wouldn't bring in a line that would be overwritten anyway) and invalidated upon exit (so the cached wouldn't have to write back stale data). As he said, this effectively enabled them to treat the cache as an extended register file. Strangely nobody has copied this idea.
There are great stories about the development, but very little other detail is available and AFAICT, very few were actually built. 801 was not a single chip design and RISC didn't become an overnight success until it was built in a single chip (which enabled much higher frequency and was the true key to success).
ADDED: Also, their simulator had a neat trick to make it fast: all I$ lines had an 8X (IIRC) shadow where for each fetched instruction there would be a short sequence of host instructions emulating it. Thus to simulate an 801 instruction they would just ensure the line was fetched and branch directly to the corresponding address in the simulation cache which could fall through to the next instruction until either a branch or the end of the line was reached.