The vector extension is still in draft and still changing. We don't want to add support that we will have to remove later if the proposal changes again. But we have support in the rvv-intrinsic branch at github.com/riscv/riscv-gnu-toolchain. There is also LLVM work, they have different rules for development, so are handling this differently.
Thanks. That's rather what I'd expect, but I was surprised at hardware being announced with (some version of) the vector extension and wondered what support there would be for it. Is it reasonable to ask what you might expect in terms of changes if you started playing with an initial implementation, or is it still wide open? (Assuming the right Jim!)
The vector extension is getting close to being formally submitted, so things should settle down. There was a major compatibility break a few weeks ago, but I'm hoping that was the last one. We won't know for sure until it is approved.
Vendors advertising vector support will have to maintain their own toolchains if they implement drafts. Most vector support is in IP cores, and they can be changed to follow the draft. There is no problem until someone makes an ASIC. Unfortunately Alibaba already did that and they are going to have lots of problems as they are incompatible with everyone else. But most everyone else is waiting for the official vector extension before making ASICs.
