I'm sure it is already in the works. WASM is the key to be independent of the ISA and allows to switch to custom silicon without having the customers to know. That's how cloud vendors will drive the future in the race to get independent from x86 and ARM (very likely that a future owner of ARM will limit the licensing business). So even if there is no performance gain possible due to the reasons you have pointed out, it's probably the abstraction layer of the future for pretty much everything.
Why? As I just said, this kind of hardware approach doesn't make technical sense.
> WASM is the key to be independent of the ISA and allows to switch to custom silicon without having the customers to know.
We already have ISA-independence with JavaScript, Java bytecode, .Net, Python, and other high-level languages.
Again, WASM isn't intended for direct execution on hardware, it's intended to be fed to an optimising JIT compiler. Direct execution on hardware isn't how you get good performance out of an IR like this.
> That's how cloud vendors will drive the future in the race to get independent from x86 and ARM
I don't think cloud vendors care all that much who they buy their CPUs from. AWS offer instances on Intel, AMD, and ARM CPUs. If they really want ISA-freedom, their best bet is RISC-V.
> even if there is no performance gain possible due to the reasons you have pointed out, it's probably the abstraction layer of the future for pretty much everything.
There will never be a single abstraction layer for everything. Compiler engineering doesn't work that way.
