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Almost all modern fast serial interfaces are descended from ECL. Often with a twist that while receiver is ECL/CML-style long-tailed pair (which is the obvious implementation of comparator), the transmit side is normal CMOS totem-pole output stage coupled with some passive network to produce right voltage levels (and right output impedance).



Wait, what? You can do a MOS long-tail pair just fine, can't you? Similarly for a totem pole with BJTs.

They're topological circuit constructions that work for either family - aren't they?




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