I don't know about µarch details but a bunch of bigger-picture things have contributed to AMD's run:
Spinning off their foundry ops led to AMD getting to use TSMC, who turned out to have a great process node at 7nm. Indirectly, it probably helps that other huge customers mean TSMC can amortize their process development costs across all of them.
The chiplet approach with a separate I/O die has various advantages:
- The Zen 2 chiplet is identical from the cheapest client CPU to the most expensive server CPU. Surely reduces complexity, and silicon that won't work in a server part might work in a client chip or whatever.
- Relatedly, binning 8-core chiplets is way more forgiving than binning huge monolithic CPUs like Intel's doing; with AMD lots of cores and high perf doesn't require a huge, uniformly near-perfect die, just enough chiplets that meet the spec that you can glue together.
- The I/O die is on a very mature, probably cheaper GloFo process, which may have made it less costly for AMD to offer interesting features on the I/O side (PCIe 4 and 128 lanes even for the cheapest server part, AES-128 in the memory controller, etc.).
Won't happen this gen, but I kind of expect Intel to eventually use some version of chiplets for their larger parts. They're talking about their advanced stacking/packaging tech, so not totally outlandish. Short-term they do have a two-die Cascade Lake mega-CPU planned, but I mean more broadly.
One cost of chiplets is in higher DRAM access latencies. AMD's done things to try and mitigate that, including just using lots of L3 cache. From benchmarks it seems to work.
The Intel analysis also mentions their shift to higher-margin parts as important.
I don't know how critical it is to the story but AMD also did some deals that may've given them resources to invest in their designs, like the GloFo spinoff, the deal to sell Epyc 1 clones in China, and the deals to produce Xbox and Playstation chips.
Finally, Intel would ordinarily have their own progress that would make AMD look comparatively worse. But 10nm stalled an incredible amount of time and Intel's post-Skylake core design, Sunny Cove, depended on it.
I don't know about µarch details but a bunch of bigger-picture things have contributed to AMD's run:
Spinning off their foundry ops led to AMD getting to use TSMC, who turned out to have a great process node at 7nm. Indirectly, it probably helps that other huge customers mean TSMC can amortize their process development costs across all of them.
The chiplet approach with a separate I/O die has various advantages:
- The Zen 2 chiplet is identical from the cheapest client CPU to the most expensive server CPU. Surely reduces complexity, and silicon that won't work in a server part might work in a client chip or whatever.
- Relatedly, binning 8-core chiplets is way more forgiving than binning huge monolithic CPUs like Intel's doing; with AMD lots of cores and high perf doesn't require a huge, uniformly near-perfect die, just enough chiplets that meet the spec that you can glue together.
- The I/O die is on a very mature, probably cheaper GloFo process, which may have made it less costly for AMD to offer interesting features on the I/O side (PCIe 4 and 128 lanes even for the cheapest server part, AES-128 in the memory controller, etc.).
Won't happen this gen, but I kind of expect Intel to eventually use some version of chiplets for their larger parts. They're talking about their advanced stacking/packaging tech, so not totally outlandish. Short-term they do have a two-die Cascade Lake mega-CPU planned, but I mean more broadly.
One cost of chiplets is in higher DRAM access latencies. AMD's done things to try and mitigate that, including just using lots of L3 cache. From benchmarks it seems to work.
The Intel analysis also mentions their shift to higher-margin parts as important.
I don't know how critical it is to the story but AMD also did some deals that may've given them resources to invest in their designs, like the GloFo spinoff, the deal to sell Epyc 1 clones in China, and the deals to produce Xbox and Playstation chips.
Finally, Intel would ordinarily have their own progress that would make AMD look comparatively worse. But 10nm stalled an incredible amount of time and Intel's post-Skylake core design, Sunny Cove, depended on it.