On: Compiling my own SPARC CPU inside a cheap FPGA

[Cyph0n]

I’m confused. I did a bit of Googling, and it appears that Pano Logic used Xilinx FPGAs. I’m guessing the Pano G1/G2 contains a board that the Xilinx FPGA is housed on?

At first, I was extremely impressed that a 50 employee company could design their own FPGA chip.

[tverbeure → Cyph0n]

Right.

Here are the internals of the G2: https://tomverbeure.github.io/pano/logic/2018/12/02/Pano-Log...