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rwmj
on Oct 20, 2019
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Compiling my own SPARC CPU inside a cheap FPGA
There's actually an open source DDR4 controller[1]. To my untrained eyes it looks quite complex. It's written in Python using Migen[2] to generate the HDL.
[1]
https://github.com/enjoy-digital/litedram
[2]
https://github.com/m-labs/migen
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[1] https://github.com/enjoy-digital/litedram
[2] https://github.com/m-labs/migen