I answered more of my questions about energy costs: in part II Appendix C the authors explore the energy of a synaptic firing event. The on-chip energy expended: 41 attojoules. (Though in part V the authors conclude that their earlier Part II analysis was probably flawed, and the circuits probably need 4 times as much current.) That 41 attojoules on-chip translates to about 24 femtojoules of whole-system energy consumption. That in turn compares favorably to the ~10 picojoules (10000 femtojoule) of energy required to perform a single precision floating point arithmetic operation on CMOS hardware. But this "neuromorphic" design is not easy to compare to contemporary hardware on complete tasks, because it's more analog than digital. And it's not clear that it can easily interoperate with existing artificial neural networks built on digital logic, either for training or inference. A low level "direct" comparison may be effectively impossible. Instead we'd have to ask questions like "how many joules per face recognized?" for complete facial recognition systems, admitting that GPU-based ANNs and superconducting optoelectronic ANNs would have very different internal structures.
Finally, I'll note that these designs rely on large numbers of Josephson junctions. From my quick Wiki-skim it appears that nobody has ever built large scale integrated circuits from Josephson junctions. It doesn't look like there have even been serious Western attempts at it after the 1980s. That's not to say that large scale fabrication of circuits incorporating Josephson junctions is folly, but it looks like it requires a lot of basic R&D effort before somebody can build one of these superconducting optoelectronic chips, much less a whole wafer full of interconnected copies.
I don't think a star-system sized computational network is supposed to be used for the mere face recognition that my phone can already do. So the metric may be comparing apples to oranges.
Finally, I'll note that these designs rely on large numbers of Josephson junctions. From my quick Wiki-skim it appears that nobody has ever built large scale integrated circuits from Josephson junctions. It doesn't look like there have even been serious Western attempts at it after the 1980s. That's not to say that large scale fabrication of circuits incorporating Josephson junctions is folly, but it looks like it requires a lot of basic R&D effort before somebody can build one of these superconducting optoelectronic chips, much less a whole wafer full of interconnected copies.