On: DDR5 memory is on its way, twice as fast as DDR4

[Retric]

I very much rounded the output to represent minimal accuracy and while 9.51 e-1 is not accurate to 3 digits 1 digits of accuracy * 1 digits of accuracy = less than 1 digits of accuracy.

Anyway, if you actually trace the furthest bit of a ram chip to the CPU it's a longer path than you might think > 1 foot but < 3 feet.

As to my point tCL is a round trip latency and actually not that far from optimal. DDR is not designed for pure random access so much as cheap access to lot's of ram so yes there are many trade offs, but they are more reasonable when your close to hard limits.

[gatsby99 → Retric]

Best practice is to have traces less than 3"

[Retric → gatsby99]

Traces only go from CPU pin to Module, latency includes from memory controller CPU pin, CPU pin to PCB, PCB to module, module to RAM chip edge, ram chip edge to actual memory location.

Here is a picture, from the center of the CPU, to the bottom edge of the furthest part of the DIM then up. http://harddiskdirect.com/media/catalog/product/cache/1/imag...

PS: A DIMM is just over 5 inches wide and 0.7 inches tall so if was centered physically on top of a CPU that's 3 inches right there.

[gatsby99 → Retric]

You don't know what you are talking about. Memory controllers are typically onchip.

[koverstreet → gatsby99]

"You don't know what you are talking about" is not a great response to someone who's writing more substantive posts than you.

[Retric → gatsby99]

If by on chip you mean on CPU I agree: https://en.wikipedia.org/wiki/Memory_controller

But, that's part of the CPU packaging, a signal needs to get to these pins on the bottom of the CPU and that takes time.