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cyphar
on Jan 30, 2017
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Free Range VHDL – VHDL programming book available ...
Quite a few people have been working on making VHDL more accessible by generating it all from Python. Tim Ansell gave a talk about it at LCA 2017 (
https://www.youtube.com/watch?v=MkVX_mh5dOU
), and it seems pretty cool.
gluggymug
on Jan 30, 2017
[–]
No way to specify different clocks or resets from what I can see. That's a massive limitation to your designs.
Consider applying for YC's Spring batch! Applications are open till Feb 11.
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