Hacker News
new
|
past
|
comments
|
ask
|
show
|
jobs
|
submit
login
kbumsik
on Jan 30, 2017
|
parent
|
context
|
favorite
| on:
Free Range VHDL – VHDL programming book available ...
You can design an ASIC with HDL before it is produced but ASIC is not programmable. An ASIC is produced as it is. So you CAN'T WRITE an ASIC.
Consider applying for YC's Spring batch! Applications are open till Feb 11.
Guidelines
|
FAQ
|
Lists
|
API
|
Security
|
Legal
|
Apply to YC
|
Contact
Search:
