You can most certainly build ASICs in VHDL. VHDL is not restricted to any target...

You can most certainly build ASICs in VHDL. VHDL is not restricted to any target technology. There are (commercial) tools which allow you to synthesise the masks needed for ASIC production from RTL (register transfer level) VHDL code given a cell library for your target technology. See random Google search result [1].

[1] http://web.engr.oregonstate.edu/~traylor/ece474/vhdl_lecture...