In ye-olde planar layouts (TTL-era) they were routed quite similar, like arteries and veins, with small 100n caps and the TTL chips as a sort of capillaries.
However, this kind of power supply routing (not sure Am. call it idiomatically, some here call it a "ladder supply/layout") has poor electrical properties, unsuitable to operating logic beyond a couple MHz.
However, this kind of power supply routing (not sure Am. call it idiomatically, some here call it a "ladder supply/layout") has poor electrical properties, unsuitable to operating logic beyond a couple MHz.