I think that historically, n-bits refers to the architecture's word length and that may or may not match the size of the address bus for a particular processor. Likewise, historically, multiple smaller than word-length data structures were sometimes packed into single words. The mantissa and exponent of IEEE 754 kinda' sorta' do something like that if I squint real hard.
Not that bitpacking words is particularly execution efficient, but maybe the space savings is worth it. Probably the sort of thing that's worth benchmarking in an actual app. Likewise with memory usage; I mean 1GB may be more than enough for a particular application and minimizing the OS may be a useful tradeoff for saving halving reads on 64b or greater data structures.
Anyway, the intent of my comment was to provide an explanation not promote one dogma over another...I think the big reason the SoC is 64b is 64b seems to be a sweet spot in the ARM powered credit card sized computer market place right now. And if I were considering this board but 2GB RAM was a concern, I'd probably go with an AllWinner board with that much. For example a BananaPi: http://www.banana-pi.org/
Not that bitpacking words is particularly execution efficient, but maybe the space savings is worth it. Probably the sort of thing that's worth benchmarking in an actual app. Likewise with memory usage; I mean 1GB may be more than enough for a particular application and minimizing the OS may be a useful tradeoff for saving halving reads on 64b or greater data structures.
Anyway, the intent of my comment was to provide an explanation not promote one dogma over another...I think the big reason the SoC is 64b is 64b seems to be a sweet spot in the ARM powered credit card sized computer market place right now. And if I were considering this board but 2GB RAM was a concern, I'd probably go with an AllWinner board with that much. For example a BananaPi: http://www.banana-pi.org/