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Ah. MIT, never change. Mind, this kind of stuff could come out of other institutions as well. They shouldn't change either.

Anyways, can we have a version of TIS-100 where you write brainfuck with added message sending primitives instead of the TIS-100 asm? Of course, each BF interpreter would be working with only, say, 2 or 3 cells of RAM.

I want to see either that, or a TIS-100 asm compiler for GreenArray chips. Or both.




"Just because you can, doesn't mean you should"


"Just because we shouldn't doesn't mean we won't"


"...and when we do, it's gonna be awesome!"




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