How are you getting this impression from them? I've seen literally nothing from them that would suggest they are trying to make it seem like they are the only one working with RISC-V
As you were already saying, it is not our goal to make it seem as if we were the only ones out there that work with RISC-V. We want to share our work in the hope that others find it useful and maybe be able to use it for their own projects.
In fact we are very much aware that there are others that have implemented RISC-V based cores and we have learned a lot from their work. PULPino is not limited to just one core, but also provides a bus, peripherals and so on. What we published is using the RI5CY core that we developed in-house, but the PULPino platform can also be used with any other RISC-V based core. For example we have made some experiments with Z-Scale which only took us a couple of hours to integrate with the platform.
Not yet, but you can synthesize a few of them on FPGA boards which you can buy today, and I believe the lowRISC team in particular is working towards Pi-like boards IIRC.
* Rocket https://github.com/ucb-bar/rocket-chip
* lowRISC ASIC http://www.lowrisc.org/
* PicoRV32 https://github.com/cliffordwolf/picorv32
* BOOM (derived from Rocket) https://github.com/ucb-bar/riscv-boom
* SODOR https://github.com/ucb-bar/riscv-sodor
* VSCALE https://github.com/ucb-bar/vscale
Anyone know of any more?