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yes, and in 2022, the company that bought their stock, Excess Solutions, also shut down. https://twitter.com/TubeTimeUS/status/1548349563936722944


these exist, they're called tramways but they are more common in europe.


great project! i ran into it the other day and was impressed with the number of wires.

i've been reverse engineering PCBs (mostly 2-4 layers) for a few years now and this is a part of the problem that i've been thinking about how to solve. best i can think of is a flying probe station cobbled together from 3d printers. basically you'd 1) scan the top and bottom of the board 2) generate a list of test points and pads 3) feed the coordinates into the flying probe system to generate the netlist

the other way to handle multilayer boards (and the most accurate, imo, because it captures exact ground plane designs, guard traces, and structures like that) is the scan-sand-scan approach. you'll get exact artwork--unfortunately the dust it generates is pretty nasty stuff.


I think with the Image->CAD data you could hack together something resembling a die-bond machine to automate the process. A flying probe would need two heads on both sides for full coverage of continuity, and some algorithms to probe multiple times with micro-offsets to deal with near-hits and bad connection hits. You could also monitor the probe heads for changes in capacitance to infer the quality of the probe hit.


I was also surprised not to see a flying probe system - I would expect this to be viable with modern 3D printer motion & control systems, but obviously this is highly non-trivial and has lots of mean details in the mechanical, electronics and software domains to solve.

I did not think of a die-bond machine (I suppose it bonds a wire to each pad instead of you doing it by hand?), but of course that also makes sense. And at least the motion system is much simpler.

A first step/experiment could be to automate creation of the gnd net. For that you only need a single tool head, meaning you can repurpose mostly any 3D printer motion system; for small increments, this could (later) happen during the die-bond process or become a precursor to a flying probe tool head. Of course I can not judge if that's a worthy investment of your time, or if you would enjoy building something like this ;)

Anyway, the effort, skill and dexterity are amazing! Spending 3 weeks soldering 1917 tiny leads seems to be just the icing on the cake :)


What can be done with the reverse-engineered data about the PCB? You have a working one, you reverse-engineer it, and then ultimately you can make your own?


PCB information is useful for, among other things, doing board-level diagnostics and repairs of broken electronics to avoid turning it into e-waste.


It can be used to find connection points to signals that would otherwise be inaccessible or at least hard to get to. This has come in pretty handy for the latest wave of Nintendo Switch hacks like Picofly. The scan-sand-scan approach [0] has the advantage over this hack where you can do something like the "kamikaze mod" [1] on the OLED Switch since you know where stuff is, not just what is connected to what.

[0] https://balika011.hu/switch/lite/

[1] https://www.youtube.com/watch?v=LMnS7yfu3Qk (not for the faint of heart)


Wow, grinding through 2 layers of PCB to get to the third. That takes dedication!


Why do you reverse-engineer PCBs? What resources did you use to get started?


Is there an automated tool for generating netlists from scanned PCB layers?


Looks like the answer is yes, for money. Nothing I can quickly find that is FOSS.

It doesn't seem like this problem requires anything crazy, just traditional computer vision, but of course the devil is in the details.


The issue I was concerned about was dealing with high-density interconnect microvias. This PCB is 10-layers with a core of 4 layers of normal vias, and 3 layers of lasered microvias on each side. Someone has actually done the sand and scan method on this board you can view here: https://balika011.hu/switch/lite/

PCBs can warp to various amounts post reflow, which can cause all sorts of problems with parallelism between your PCB and sanding surface. You would also be able to mitigate this type of attack by filling vias with conductive epoxy and plating over them, which is a well established process option in PCB fabrication.


I expected scan-and-sand to be somewhat automated, but they're doing it by hand? Incredible!

Might another way to resolve issues with the PCB dishing be to photograph the layers at a fraction of a layer height? So that in that way you have a lot more slices to work with, and you can digitally "flatten" the PCB?


Making a machine to automagically remove a tiny bit of material and image the result over and over would be easy for me. The image processing to take the stack of 3D sequential images and automagically process them into a netlist is well beyond my programming capabilities. If anyone thinks they could do this, contact me.


Not gonna pretend I have the solution, but it sounds like most of the groundwork for that has been laid out in medical imagery already. CT scans, combined into volumes, identifying structures..


That's what I was thinking, but now I'm pretty sure it doesn't even need crazy algorithms like that.

1. align the image stack. not trivial, but a common task.

2. take several cross-sections, in both dimensions, and have a human draw a line along a specific layer line

3. linearly interpolate these lines into a surface.

4. for each pixel in each output layer, set the value to layers[l + offset][x][y], where the offset was calculated in step 3.


Steps 3 and 4 seem like a largely solved problem using blob detection in computer vision libraries. The last step is in plated via detection. If no microvias are present this seems pretty easy: just look for circles. If microvias are present then you need to check for plating at each layer for each hole below a certain size. That seems difficult if the sanding process does not result in very clean features.


There are automated tools for generating a netlist from scanned IC layers (nm thick). They're proprietary trade secrets of course, but it's done all the time.


This is the most useful comment in the thread (so far)!

This product would not work at all for any analog or power designs--EEs like to visualize current flow and a schematic is the best way to do that. Maybe if it could interoperate with small blocks of schematics, treating them as modules, it could be useful. If there was a way to parameterize part values, like those used to build analog filters, that could also be useful, but not in the current text-only form.

The one thing it could be useful for is creating net connectivity for large numbers of pin to pin connections, like DDR memory or PCIe buses. Schematics for these end up looking like large data tables anyway, and can be tedious to create and prone to errors.

I see so many EDA startups using their product for simple Arduino boards and other low to medium complexity designs. It's far more effective to start with the most complex board design. Take a server board from the OpenCompute project with a few thousands parts and a few tens of thousands of nets. What would that look like in this language? Would it have too much boilerplate code? What would the experience of creating it be like? How do you handle back annotation? How do you handle pin swaps, or part section swaps? How about BOM variants?


> The one thing it could be useful for is creating net connectivity for large numbers of pin to pin connections, like DDR memory or PCIe buses. Schematics for these end up looking like large data tables anyway, and can be tedious to create and prone to errors.

This is a good example. I'll expand it to include such things as breaking up the symbols for a large FPGA (say, over 1000 pins) into multiple schematic blocks and managing them as the schematic design progresses. Very often you have to move pins around within the same block or between blocks just to arrange them logically or align them with whatever they might connect to.

For example, take the output of an FPGA bank and connect it to the input of an HDMI transmitter chip. You would want to align the red, green, blue, clock and control pins so that you can connect them with a bus that looks right. If someone reading this isn't clear, imaging arranging the pins on each device in random order where, for example, the first chip has R0,B8,R1,G5 and the second chip is R0,R1,R2, etc.

This kind of thing is tedious and painful.

The way we solve the problem with Altium was to write code that allows us to fully define an FPGA (and other IC's) using data entry in Excel. One turn of the crank creates all symbols and PCB patterns and exports into the libraries. This took something that was a days-long torture to maybe 45 minutes of work. After that, if you need to move pins around, it takes minutes to update everything.

This is also an example of why a text file based approach would not be as useful. Entering data in Excel is very easy. Editing it is just as easy. In some cases you can even copy and paste from datasheets and easily edit or rearrange. I can also write formulas to generate sequences of pins, etc.

Having to manage this in a text file would not be as slick. Over the years, I have found that Excel, coupled with VBA code, is a very powerful tool for schematic entry and PCB design.



a whole bunch of stuff over the years. one unusual find was an original Williams tube memory from an IBM computer. https://twitter.com/TubeTimeUS/status/1441865304427036675


don't forget that the 3rd edition has a separate volume titled The Art of Electronics: The X Chapters which includes some really fascinating material i've never seen anywhere else. a lot of practical design tips for working with real components along with some very advanced circuit designs. if you're already an EE, this volume is a great way to sharpen your skillset.


a more useful book for audio electronics is Handbook for Sound Engineers by Ballou. there are detailed discussions of common preamp circuits, equalizers, and that sort of thing.


for analog IC design, i highly recommend the excellent Designing Analog Chips[1] written by the person who designed the 555 timer. other books are more comprehensive and will give you all the theory, but this book is concise, practical, and free (at least for the pdf version).

[1] http://www.designinganalogchips.com/


that is why the word art is in the title. regardless, it gives you a good feel for how many engineers actually design stuff in the industry. the problem spaces aren't fully constrained, so you have to fill in the gaps with experience, guesswork, experimentation, and (yes) art.


Yes, I realize art is in the title and get the general sentiment. But this book is often proposed as a way to learn electronics from scratch. I'm not terribly sure it accomplishes that. My thoughts are that it's probably similar to the Feynman lectures: terrible to learn from as a first introduction but great once you have already learned the material.


How does it compare in approach with The Art of Computer Programming, which is more of an encyclopaedia like view of the subject.


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