CPUs have multiple cache levels because the machine cycle at the CPU die is ~500ps while writing to main memory and then need to read it at the same latency, that’s going to be around 200ns while the CPU is idle.
To mask this, we write back to cache and rely on cache coherency algorithms and multiway, multilevel caches to make sure main memory is written back to and read when cache tags are invalidated.
tl;dr - Current process technologies make SRAM very much faster than DRAM and multiple levels of multiway caches create a time based interface to maximise memory throughput to the CPU regsisters while maintaining coherent memory write backs.
It’s worth noting that Apple Silicon is fast because their DRAM bandwidth is much closer to the same machine cycle latency as the APU cores’caches and registers.
The thing people have a problem with is that Microsoft is claiming that it will be carbon neutral by 2030 but it can't be true so they're just bullshitting.
I was at Microsoft as a blue badge when they intro'd the carbon neutral by 2030 initiative and the first employee to ask about how this was possible was politely swatted down by Nadella in a live company meeting.
"why are we pressuring private companies at all?"
Because what Microsoft is doing is unsustainable but Nadella and the c-suite are too busy buying back stock to care. Microsoft doesn't actually make anything anymore - they just acquire technologies and extract the value and move on.
The OpenAI acquisition will take down Microsoft because to stay on the trajectory Nadella has bet the farm on would require Moore's Law to still be increasing compute mips/watt but that ended a while ago.
By the time these companies (Google, Apple, Microsoft, Meta) realize that AI will require geometrically more compute when only a linear increase in MIPS/watt is all we are going to get out of silicon.
That none of these firms are building silicon photonics labs to be the first to make this incremental leap away from CMOS shows that they're only vaguely aware that AGI isn't anywhere close to being a reality with any silicon based technologies.
Using bullshit technology, aka AI, to look for unknown amounts of oil while telling the press the date you will be carbon neutral is just unethical garbage like so much else Microsoft does.
"the secret" is spending a long serial period of time deep in architecting solutions because the time you spend doing that kind of work compounds like interest.
In what sense? Testing my memory here, but it let you install stuff from various developers. Cydia cranked things up several notches (thanks for that, by the way), but are they both not "stores"?
I guess, to me, the defining characteristic of a "store" is that you can buy things at a store... it just feels awkward to say that a store is just a place that has things and lets you get them on request ;P.
AppTapp Installer was merely a package manager, and they did not implement any store functionality. FWIW, in Cydia's case, I didn't launch "Cydia Store" until about a year after I launched "Cydia Installer".
(AppTapp also wasn't the first package manager for the iPhone, but maybe it was the first one on-device? The one I had used involved USB and some web page I think, but I am forgetting the name.)
>A place where items may be accumulated or routinely kept.
Didn't installer.app come configured for repositories of software you could install? I seem to remember one of the first things people installed was an app that gave you extra repos to choose from
Cydia was awesome. As a kid, the porting of apt and dpkg to ios was what got me into linux and debian, having only had access to an ipod touch before. Thank you for your work, it is inspiring.
This is specifically talking about alternate app stores through Apple's new official way of doing it. If we're talking about alternate app stores in general, even AltStore itself was before AltStore PAL
I mostly use Carbon Copy Cloner, PathFinder, ditto and rsync because if I try to copy anything more than a few files it's like I'm running MacOS 9 and I have to babysit the copy like it's a five year old riding a bike with training wheels.
It's pretty clear whomever is leading MacOS dev efforts has been given the directive to not commit any new resources to the MacOS Finder.
For organizing files, I use File Browser Pro (iOS/Apple Silicon), Leap, DevonTHINK and anything else except the finder and tags which have never really worked very well.
There are bugs in the Finder and Disk Utility that have persisted for multiple OS releases and I simply don't trust GUI file management tools in modern MacOS.
In my view, Apple has decided to kill the Mac as a tool and wants everyone to use their Apple devices as consoles except devs who have to put up with being treated as second class citizens while Apple simultaneously uses the same lot of folks to do QA during "public betas".
As an Apple follower for decades, I'm running away from the platform and have recently replaced iCloud (for all intents and purposes) with Syncthing. I use old Intel Macs as daily drivers because you can't really multitask effectively with Apple Silicon -and- work with files because, well, memory contention is still a problem with iGPUs just like it always has been. The speed-up of the much vaunted Apple Silicon has EVERYTHING to do with the physical proximity of the processor cores to the DRAM except when you have a lot of process running then the kernel panics because memory contention issues with storage since MOST storage has to be on the USB bus and you can get into situations where the Mac can't keep the files system consistent because APFS, snapshots and Time Machine are a fuxxing disaster... sorry folks. /venting.
I think Jeff should try ssfs with disk images on either end to get closer to 125 MB/s.
> It's pretty clear whomever is leading MacOS dev efforts has been given the directive to not commit any new resources to the MacOS Finder.
Funny to say, because I just noticed the other day that as of the latest macOS version, Finder directory copies now have some kind of progress metadata (as an xattr of the top level copied folder?) that allows you to cancel [or presumably fail due to network loss] and then later resume copies.
This is both a blessing (when it actually works on a huge transfer) and a curse (when things are being weird, usually network issues or a flaky remote connection, and you can't remove the weird greyed-out folder).
> and you can't remove the weird greyed-out folder
I'm not sure I've run into this state, but I would guess it would work to toggle your wi-fi off to trip the folder over into the "transfer failed" state (where it's no longer greyed out, and instead displays the little "Retry" emblem on the filename), and then delete it.
I've watched Waymo cars, multiple times, from a traffic-lighted intersection, as the lead vehicle, from the left lane, stop 100% when the light it green until other cars pass in frustration and then cross 4 lanes to make the next RIGHT turn.
Traffic disruption with Waymos is UNDOCUMENTED and a real thing.
I worked at Intel when the first mobile Pentiums were being developed. Back then, gate oxides were 10-12 atoms thick. That was nearly 30 years ago and feature size was 350nm or .35 micron.
Today's 3nm processes use 3 dimensional gates that have film thicknesses on the order of 5 to 8 atoms thick and the features size is smaller than the wavelength of light used to measure expose wafers' different mask reticles that rely on using light slit interference to make features smaller than the EUV wavelength of around 10nm.
To get much smaller than 1nm using these techniques is going to run into fundamental physical limits in a decade and probably that limit will be around .5nm feature size.
The next frontier in silicon will be building three dimensional chips and IBM is a pioneer in 3D stacking of CMOS gates.
To mask this, we write back to cache and rely on cache coherency algorithms and multiway, multilevel caches to make sure main memory is written back to and read when cache tags are invalidated.
tl;dr - Current process technologies make SRAM very much faster than DRAM and multiple levels of multiway caches create a time based interface to maximise memory throughput to the CPU regsisters while maintaining coherent memory write backs.
It’s worth noting that Apple Silicon is fast because their DRAM bandwidth is much closer to the same machine cycle latency as the APU cores’caches and registers.