eleson's comments

On: Popcount CPU instruction

[eleson]

It is part of the Bit Manipulation extension. So is count leading zeros. Unfortunately it is still in draft.

The math extensions are not in draft.

[ncmncm → eleson]

Being in an extension means you can't count on it being there.

[dralley → ncmncm]

That's a feature (for hardware designers) not a bug.

RISC V is not really designed to be a good high performance oriented ISA. They're aimed square at the embedded market.

[ncmncm → dralley]

It's a feature for hardware designers working with 250 nm transistors.

Modern designers working with modern processes have the problem of discovering what they can throw a million transistors at that will actually make real programs faster. Hint: bitmanips!