The striping to have a memory location per core is great for performance but can have a noticeable memory overhead.
It would be interesting to have Intel TSX in the mix. It can be a benefit to some workloads and does not require many adjustments to your code.
The striping to have a memory location per core is great for performance but can have a noticeable memory overhead.
It would be interesting to have Intel TSX in the mix. It can be a benefit to some workloads and does not require many adjustments to your code.