| | Chasing resets (zipcpu.com) |
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35 points by fayalalebrun 5 months ago | past | 2 comments
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| | An Overview of a 10Gb Ethernet Switch (zipcpu.com) |
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2 points by hasheddan 10 months ago | past
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| | Clock Gating (zipcpu.com) |
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2 points by vonadz on Oct 27, 2021 | past
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| | The FPGA Designer Who Didn't Get the Job (zipcpu.com) |
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94 points by PaulHoule on July 22, 2021 | past | 78 comments
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| | Fixing Xilinx's Broken AXI-Lite Design in VHDL (zipcpu.com) |
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1 point by todsacerdoti on May 23, 2021 | past
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| | Lessons learned while building an ASIC design (zipcpu.com) |
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12 points by stefanpie on May 13, 2021 | past
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| | Clocks for Software Engineers (2017) (zipcpu.com) |
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2 points by rudedogg on Feb 3, 2021 | past
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| | Just how long does a formal proof take to finish? (zipcpu.com) |
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1 point by matt_d on Aug 3, 2019 | past
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| | Interpolation is just a special type of convolution (zipcpu.com) |
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2 points by adamnemecek on July 20, 2019 | past
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| | About the ZipCPU (zipcpu.com) |
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178 points by peter_d_sherman on Oct 4, 2018 | past | 46 comments
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| | An Open Source Pipelined FFT Generator (zipcpu.com) |
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42 points by matt_d on Oct 2, 2018 | past | 4 comments
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| | Pipelining a Prefetch (zipcpu.com) |
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1 point by ingve on March 21, 2018 | past
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| | Is formal really all that hard? (zipcpu.com) |
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1 point by matt_d on March 15, 2018 | past
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| | Building a prefetch module (zipcpu.com) |
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31 points by secondary on Nov 21, 2017 | past
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| | My first experience with Formal Methods (zipcpu.com) |
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4 points by kasbah on Oct 21, 2017 | past
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| | My first experience with formal methods (zipcpu.com) |
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96 points by matt_d on Oct 20, 2017 | past | 19 comments
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| | Differences between FPGA and ASIC development (zipcpu.com) |
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6 points by matt_d on Oct 13, 2017 | past
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| | It's all about the interfaces (zipcpu.com) |
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2 points by eaguyhn on Oct 8, 2017 | past
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| | A CORDIC testbench (zipcpu.com) |
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1 point by eaguyhn on Oct 5, 2017 | past
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| | Clocks for Software Engineers (zipcpu.com) |
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434 points by mr_tyzic on Sept 19, 2017 | past | 59 comments
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| | Using a CORDIC to calculate sines and cosines in an FPGA (zipcpu.com) |
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1 point by cjdrake on Sept 2, 2017 | past
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| | Rules for new FPGA designers (zipcpu.com) |
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190 points by jsnell on Aug 24, 2017 | past | 74 comments
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| | Minimizing FPGA Resource Utilization (zipcpu.com) |
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73 points by jsnell on June 13, 2017 | past | 6 comments
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